Parametric results for: SN74AUP1G79DRLRG4 under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Moisture Sensitivity Level Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Characteristics Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

AUP/ULP/V 1

1 hit Apply

R-PDSO-F5 1

1 hit Apply

e4 1

1 hit Apply

1.6 mm 1

1 hit Apply

Load Capacitance (CL) (1)

30 pF 1

1 hit Apply

D FLIP-FLOP 1

1 hit Apply

Manufacturer (1)

Texas Instruments 1

1 hit Apply

1.7 mA 1

1 hit Apply

1 1

1 hit Apply

Number of Bits (1)

1 1

1 hit Apply

Number of Functions (1)

1.0 1

1 hit Apply

5 1

1 hit Apply

85.0 °C 1

1 hit Apply

-40.0 °C 1

1 hit Apply

Output Characteristics (1)

3-STATE 1

1 hit Apply

TRUE 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

Package Code (1)

VSOF 1

1 hit Apply

FL6,.047,20 1

1 hit Apply

RECTANGULAR 1

1 hit Apply

SMALL OUTLINE, VERY THIN PROFILE 1

1 hit Apply

Prop. Delay@Nom-Sup (1)

24 ns 1

1 hit Apply

Propagation Delay (tpd) (1)

24 ns 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

1.2 V 1

1 hit Apply

Surface Mount (1)

YES 1

1 hit Apply

Trigger Type (1)

POSITIVE EDGE 1

1 hit Apply