Parametric results for: A40MX02-FPLG68 under Field Programmable Gate Arrays

All Filters Additional Feature Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Moisture Sensitivity Level Number of CLBs Number of Equivalent Gates Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Packing Method Part Life Cycle Code Programmable Logic Type Qualification Status Rohs Code Screening Level Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form

ALSO OPERATES AT 5V SUPPLY 2 CAN ALSO BE OPERATED AT 5.0V 9 CAN ALSO BE OPERATED AT 5.0V SUPPLY 1

25 hits Apply

48 MHz 5 48.2 MHz 2 48.24 MHz 10

Min (MHz) - Max (MHz)

25 hits Apply

Combinatorial Delay of a CLB-Max (2)

3.7 ns 12 3.72 ns 3

Min (ns) - Max (ns)

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S-PQCC-J68 21

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e3 11

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24.13 mm 3 24.23 mm 3 24.2316 mm 9

Min (mm) - Max (mm)

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Manufacturer (4)

Actel Corporation 7 Microchip Technology Inc 7 Microsemi Corporation 9 Microsemi FPGA & SoC 2

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3 18

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Number of CLBs (1)

295 12

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Number of Equivalent Gates (2)

2000 2 3000 13

Min - Max

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Number of Inputs (1)

57 18

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Number of Logic Cells (1)

295 16

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Number of Outputs (1)

57 18

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68 21

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70.0 °C 6 85.0 °C 6 125.0 °C 9

Min (°C) - Max (°C)

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-55.0 °C 9 -40.0 °C 6 0.0 °C 6

Min (°C) - Max (°C)

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295 CLBS, 2000 GATES 2 295 CLBS, 3000 GATES 13

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PLASTIC/EPOXY 21

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QCCJ 21

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LDCC68,1.0SQ 21

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Package Shape (1)

SQUARE 21

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CHIP CARRIER 21

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TUBE 1

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Active 11 Transferred 14

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 25

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Not Qualified 21

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Yes 21

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Screening Level (1)

MIL-STD-883 1

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4.445 mm 3 4.57 mm 7 4.572 mm 5

Min (mm) - Max (mm)

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3.6 V 13

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3 V 13

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Supply Voltage-Nom (1)

3.3 V 15

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YES 21

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CMOS 21

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Temperature Grade (3)

COMMERCIAL 6 INDUSTRIAL 6 MILITARY 9

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MATTE TIN 10 Matte Tin (Sn) 1

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J BEND 21

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