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74LVC74A-Q100 - Dual D-type flip-flop with set and reset; positive-edgen trigger@en-us TSSOP 14-Pin
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
74LVC74APW-Q100J by Nexperia is an FF/Latch.
FF/Latches are under the broader part category of Logic Components.
Digital logic governs the behavior of signals in electronic circuits, enabling complex decisions based on simple binary inputs (yes/no). Logic components perform operations from these signals. Read more about Logic Components on our Logic part category page.
Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
74AH2640
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Newark | Flip-Flop, D Type, 15Ns, Tssop-14, Logic Family/Base Number:74Lvc74A, Flip-Flop Type:D, Propagation Delay:15Ns, Frequency:250Mhz, Output Current:-, Ic Case/Package:Tssop, No. Of Pins:14Pins, Trigger Type:Positive Edge Rohs Compliant: Yes |Nexperia 74LVC74APW-Q100J RoHS: Compliant Min Qty: 1 Package Multiple: 1 Date Code: 0 Container: Cut Tape | 3435 |
|
$0.0560 | Buy Now |
DISTI #
1727-74LVC74APW-Q100JTR-ND
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DigiKey | IC FF D-TYPE DBL 1-BIT 14-TSSOP Min Qty: 2500 Lead time: 8 Weeks Container: Tape & Reel (TR) | Temporarily Out of Stock |
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$0.1110 / $0.1239 | Buy Now |
DISTI #
74LVC74APW-Q100J
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Avnet Americas | Flip Flop, 74LVC74A, D, 6.5 ns, 250 MHz, 24 mA, 14 Pins, TSSOP - Tape and Reel (Alt: 74LVC74APW-Q100J) RoHS: Compliant Min Qty: 7500 Package Multiple: 2500 Lead time: 8 Weeks, 0 Days Container: Reel | 0 |
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$0.0861 / $0.0953 | Buy Now |
DISTI #
771-74LVC74APW-Q100J
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Mouser Electronics | Flip Flops Quad 2-input EXCLUSIVE-OR gate RoHS: Compliant | 0 |
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$0.1130 / $0.1180 | Order Now |
DISTI #
86089910
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Verical | Flip Flop D-Type Pos-Edge 2-Element 14-Pin TSSOP T/R Automotive AEC-Q100 RoHS: Compliant Min Qty: 2831 Package Multiple: 1 Date Code: 2201 | Americas - 32500 |
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$0.0990 / $0.1325 | Buy Now |
DISTI #
86234815
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Verical | Flip Flop D-Type Pos-Edge 2-Element 14-Pin TSSOP T/R Automotive AEC-Q100 RoHS: Compliant Min Qty: 893 Package Multiple: 1 | Americas - 1360 |
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$0.0818 / $0.0846 | Buy Now |
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Rochester Electronics | Dual D-type flip-flop with set and reset, positive-edge trigger RoHS: Compliant Status: Active Min Qty: 1 | 32850 |
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$0.0792 / $0.1277 | Buy Now |
DISTI #
74LVC74APW-Q100J
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TTI | Flip Flops Quad 2-input EXCLUSIVE-OR gate RoHS: Compliant pbFree: Pb-Free Min Qty: 5000 Package Multiple: 2500 Container: Reel | Americas - 0 |
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$0.1300 / $0.1470 | Buy Now |
DISTI #
74LVC74APW-Q100J
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Avnet Silica | Flip Flop 74LVC74A D 65 ns 250 MHz 24 mA 14 Pins TSSOP (Alt: 74LVC74APW-Q100J) RoHS: Compliant Min Qty: 2500 Package Multiple: 2500 Lead time: 10 Weeks, 0 Days | Silica - 7500 |
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Buy Now | |
DISTI #
74LVC74APW-Q100J
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EBV Elektronik | Flip Flop 74LVC74A D 65 ns 250 MHz 24 mA 14 Pins TSSOP (Alt: 74LVC74APW-Q100J) RoHS: Compliant Min Qty: 2500 Package Multiple: 2500 Lead time: 10 Weeks, 0 Days | EBV - 0 |
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Buy Now |
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74LVC74APW-Q100J
Nexperia
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Datasheet
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74LVC74APW-Q100J
Nexperia
74LVC74A-Q100 - Dual D-type flip-flop with set and reset; positive-edgen trigger@en-us TSSOP 14-Pin
|
Rohs Code | Yes | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | NEXPERIA | |
Part Package Code | TSSOP | |
Package Description | TSSOP-14 | |
Pin Count | 14 | |
Manufacturer Package Code | SOT402-1 | |
Reach Compliance Code | compliant | |
Factory Lead Time | 8 Weeks | |
Date Of Intro | 2017-02-01 | |
Samacsys Manufacturer | Nexperia | |
Family | LVC/LCX/Z | |
JESD-30 Code | R-PDSO-G14 | |
JESD-609 Code | e4 | |
Length | 5 mm | |
Logic IC Type | D FLIP-FLOP | |
Moisture Sensitivity Level | 1 | |
Number of Bits | 1 | |
Number of Functions | 2 | |
Number of Terminals | 14 | |
Operating Temperature-Max | 125 °C | |
Operating Temperature-Min | -40 °C | |
Output Polarity | COMPLEMENTARY | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | TSSOP | |
Package Shape | RECTANGULAR | |
Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | |
Packing Method | TR, 13 INCH | |
Peak Reflow Temperature (Cel) | 260 | |
Propagation Delay (tpd) | 11.9 ns | |
Screening Level | AEC-Q100 | |
Seated Height-Max | 1.1 mm | |
Supply Voltage-Max (Vsup) | 3.6 V | |
Supply Voltage-Min (Vsup) | 1.2 V | |
Supply Voltage-Nom (Vsup) | 3.3 V | |
Surface Mount | YES | |
Technology | CMOS | |
Temperature Grade | AUTOMOTIVE | |
Terminal Finish | NICKEL PALLADIUM GOLD SILVER | |
Terminal Form | GULL WING | |
Terminal Pitch | 0.65 mm | |
Terminal Position | DUAL | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Trigger Type | POSITIVE EDGE | |
Width | 4.4 mm | |
fmax-Min | 120 MHz |
The recommended operating voltage range for the 74LVC74APW-Q100J is 1.65 V to 3.6 V.
Yes, the 74LVC74APW-Q100J is compatible with 5V logic, but it is not recommended to operate it at 5V continuously. It can tolerate 5V input levels, but the output voltage will be limited to the supply voltage (VCC).
The maximum clock frequency that the 74LVC74APW-Q100J can handle is 100 MHz.
No, the 74LVC74APW-Q100J does not have built-in pull-up resistors. External pull-up resistors may be required depending on the application.
Yes, the 74LVC74APW-Q100J is suitable for high-temperature applications up to 125°C. It is an automotive-grade device with a -40°C to 125°C operating temperature range.