Part Details for XCZU4EG-1FBVB900E by AMD
Results Overview of XCZU4EG-1FBVB900E by AMD
- Distributor Offerings: (5 listings)
- Number of FFF Equivalents: (0 replacements)
- CAD Models: (Request Part)
- Number of Functional Equivalents: (0 options)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
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XCZU4EG-1FBVB900E Information
XCZU4EG-1FBVB900E by AMD is an Other uP/uC/Peripheral IC.
Other uPs/uCs/Peripheral ICs are under the broader part category of Microcontrollers and Processors.
Microcontrollers (MCUs) are small, low-power integrated circuits used to control embedded systems. Microcontrollers are primarily used to automate and control devices. Read more about Microcontrollers and Processors on our Microcontrollers and Processors part category page.
Price & Stock for XCZU4EG-1FBVB900E
Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
XCZU4EG-1FBVB900E-ND
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DigiKey | IC SOC CORTEX-A53 900FCBGA Min Qty: 1 Lead time: 16 Weeks Container: Tray | Temporarily Out of Stock |
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$1,498.7500 | Buy Now |
DISTI #
XCZU4EG-1FBVB900E
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Avnet Americas | FPGA Zynq UltraScale+ Family 192150 Cells 20nm Technology 0.85V 900-Pin FCBGA Tray - Trays (Alt: XCZU4EG-1FBVB900E) RoHS: Compliant Min Qty: 1 Package Multiple: 1 Lead time: 16 Weeks, 0 Days Container: Tray | 0 |
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$1,468.7750 | Buy Now |
DISTI #
217-CZU4EG-1FBVB900E
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Mouser Electronics | SoC FPGA XCZU4EG-1FBVB900E RoHS: Compliant | 0 |
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$1,558.5500 | Order Now |
DISTI #
XCZU4EG-1FBVB900E
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Avnet Silica | FPGA Zynq UltraScale Family 192150 Cells 20nm Technology 085V 900Pin FCBGA Tray (Alt: XCZU4EG-1FBVB900E) RoHS: Compliant Min Qty: 1 Package Multiple: 27 Lead time: 17 Weeks, 0 Days | Silica - 0 |
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Buy Now | |
DISTI #
XCZU4EG-1FBVB900E
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EBV Elektronik | FPGA Zynq UltraScale Family 192150 Cells 20nm Technology 085V 900Pin FCBGA Tray (Alt: XCZU4EG-1FBVB900E) RoHS: Compliant Min Qty: 1 Package Multiple: 27 Lead time: 18 Weeks, 0 Days | EBV - 0 |
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Buy Now |
Part Details for XCZU4EG-1FBVB900E
XCZU4EG-1FBVB900E CAD Models
XCZU4EG-1FBVB900E Part Data Attributes
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XCZU4EG-1FBVB900E
AMD
Buy Now
Datasheet
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Compare Parts:
XCZU4EG-1FBVB900E
AMD
Microprocessor Circuit, CMOS, PBGA900, FCBGA-900
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Rohs Code | Yes | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | ADVANCED MICRO DEVICES INC | |
Package Description | FCBGA-900 | |
Reach Compliance Code | compliant | |
Factory Lead Time | 16 Weeks | |
Samacsys Manufacturer | AMD | |
JESD-30 Code | R-PBGA-B900 | |
JESD-609 Code | e1 | |
Moisture Sensitivity Level | 4 | |
Number of Terminals | 900 | |
Operating Temperature-Max | 100 °C | |
Operating Temperature-Min | ||
Package Body Material | PLASTIC/EPOXY | |
Package Code | BGA | |
Package Shape | RECTANGULAR | |
Package Style | GRID ARRAY | |
Peak Reflow Temperature (Cel) | 245 | |
Supply Voltage-Max | 0.876 V | |
Supply Voltage-Min | 0.825 V | |
Supply Voltage-Nom | 0.85 V | |
Surface Mount | YES | |
Technology | CMOS | |
Temperature Grade | OTHER | |
Terminal Finish | TIN SILVER COPPER | |
Terminal Form | BALL | |
Terminal Position | BOTTOM | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
uPs/uCs/Peripheral ICs Type | MICROPROCESSOR CIRCUIT |
XCZU4EG-1FBVB900E Frequently Asked Questions (FAQ)
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AMD provides a PCB design guide and layout recommendations in the '7 Series FPGAs PCB Design Guide' (UG583) and 'Zynq UltraScale+ MPSoC PCB Design Guide' (UG1242). Additionally, AMD recommends using their 'FPGA Editor' tool to generate a PCB layout template.
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AMD provides power estimation and thermal management guidelines in the 'Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics' (DS925) and '7 Series FPGAs Power Management' (UG786). Engineers can use the 'Xilinx Power Estimator' (XPE) tool to estimate power consumption and optimize their design.
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AMD provides clocking and reset guidelines in the 'Zynq UltraScale+ MPSoC Clocking Wizard' (UG1241) and '7 Series FPGAs Clocking Resources' (UG472). Engineers should use the 'Clocking Wizard' tool to generate a clocking architecture and follow the recommended reset strategies outlined in the datasheet.
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AMD provides signal integrity and EMI guidelines in the '7 Series FPGAs Signal Integrity' (UG785) and 'Zynq UltraScale+ MPSoC PCB Design Guide' (UG1242). Engineers should follow the recommended PCB layout and routing strategies, use differential signaling, and implement EMI mitigation techniques such as shielding and filtering.
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AMD provides detailed information on the processor subsystem in the 'Zynq UltraScale+ MPSoC Technical Reference Manual' (UG1085). Engineers should be aware of the processor's limitations, such as cache sizes, memory bandwidth, and interrupt handling, and follow the recommended software development flow outlined in the 'Zynq UltraScale+ MPSoC Software Developers Guide' (UG1144).