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EE PLD, 10ns, 128-Cell, CMOS, PQFP100, VQFP-100
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
XCR3128XL-10VQ100C by AMD is a Programmable Logic Device.
Programmable Logic Devices are under the broader part category of Programmable Logic Devices.
Programmable Logic Devices (PLDs) are reconfigurable digital components that can be customized for different applications, offering flexibility and improved performance over fixed logic devices. Read more about Programmable Logic Devices on our Programmable Logic part category page.
Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
XCR3128XL-10VQ100C
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Avnet Silica | (Alt: XCR3128XL-10VQ100C) RoHS: Not Compliant Min Qty: 25 Package Multiple: 90 Lead time: 143 Weeks, 0 Days | Silica - 0 |
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Buy Now | |
DISTI #
XCR3128XL-10VQ100C
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EBV Elektronik | (Alt: XCR3128XL-10VQ100C) RoHS: Not Compliant Min Qty: 25 Package Multiple: 1 Lead time: 143 Weeks, 0 Days | EBV - 0 |
|
Buy Now |
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XCR3128XL-10VQ100C
AMD
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Datasheet
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XCR3128XL-10VQ100C
AMD
EE PLD, 10ns, 128-Cell, CMOS, PQFP100, VQFP-100
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Rohs Code | No | |
Part Life Cycle Code | Obsolete | |
Ihs Manufacturer | ADVANCED MICRO DEVICES INC | |
Package Description | VQFP-100 | |
Reach Compliance Code | not_compliant | |
Samacsys Manufacturer | AMD | |
Additional Feature | YES | |
Clock Frequency-Max | 95 MHz | |
In-System Programmable | YES | |
JESD-30 Code | S-PQFP-G100 | |
JESD-609 Code | e0 | |
JTAG BST | YES | |
Length | 14 mm | |
Moisture Sensitivity Level | 3 | |
Number of Dedicated Inputs | ||
Number of I/O Lines | 84 | |
Number of Inputs | 84 | |
Number of Macro Cells | 128 | |
Number of Outputs | 84 | |
Number of Terminals | 100 | |
Operating Temperature-Max | 70 °C | |
Operating Temperature-Min | ||
Organization | 0 DEDICATED INPUTS, 84 I/O | |
Output Function | MACROCELL | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | TFQFP | |
Package Equivalence Code | TQFP100,.63SQ | |
Package Shape | SQUARE | |
Package Style | FLATPACK, THIN PROFILE, FINE PITCH | |
Peak Reflow Temperature (Cel) | 240 | |
Programmable Logic Type | EE PLD | |
Propagation Delay | 10 ns | |
Qualification Status | Not Qualified | |
Seated Height-Max | 1.2 mm | |
Supply Voltage-Max | 3.6 V | |
Supply Voltage-Min | 3 V | |
Supply Voltage-Nom | 3.3 V | |
Surface Mount | YES | |
Technology | CMOS | |
Temperature Grade | COMMERCIAL | |
Terminal Finish | TIN LEAD | |
Terminal Form | GULL WING | |
Terminal Pitch | 0.5 mm | |
Terminal Position | QUAD | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Width | 14 mm |
This table gives cross-reference parts and alternative options found for XCR3128XL-10VQ100C. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of XCR3128XL-10VQ100C, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
Part Number | Manufacturer | Composite Price | Description | Compare |
---|---|---|---|---|
XCR3128XL-10VQG100Q | AMD | Check for Price | EE PLD, 10ns, CMOS, PQFP100, VQFP-100 | XCR3128XL-10VQ100C vs XCR3128XL-10VQG100Q |
The maximum operating temperature range for the XCR3128XL-10VQ100C is -40°C to 100°C (industrial grade) and 0°C to 70°C (commercial grade).
Clock signal routing for the XCR3128XL-10VQ100C requires careful attention to signal integrity, skew, and jitter. AMD recommends using a clock tree architecture with a central clock source and distributing it to the various clock domains using a combination of clock buffers and clock distribution networks.
The recommended power-up sequence for the XCR3128XL-10VQ100C is to apply power to the VCCINT and VCCAUX power rails simultaneously, followed by the VCCO power rail. The power-up sequence should be controlled to ensure that the voltage rails rise monotonically and within the specified voltage tolerance.
To optimize the XCR3128XL-10VQ100C for low power consumption, AMD recommends using power-saving features such as clock gating, voltage scaling, and dynamic voltage and frequency scaling (DVFS). Additionally, optimizing the design for low power consumption requires careful attention to clock frequency, voltage, and leakage power reduction techniques.
The recommended PCB layout guidelines for the XCR3128XL-10VQ100C include using a multi-layer PCB with a solid ground plane, separating analog and digital signals, and minimizing signal trace lengths and vias. AMD also recommends following the JEDEC JESD51-7 standard for thermal design and the IPC-7351 standard for land pattern design.