-
Part Symbol
-
Footprint
-
3D Model
Available Download Formats
By downloading CAD models, you agree to our Terms & Conditions and Privacy Policy
Flash PLD, 7.5ns, 64-Cell, CMOS, PQFP100, 14 X 14 MM, 0.50 MM PITCH, LEAD FREE, VQFP-100
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
XC2C64A-7VQG100I by AMD is a Programmable Logic Device.
Programmable Logic Devices are under the broader part category of Programmable Logic Devices.
Programmable Logic Devices (PLDs) are reconfigurable digital components that can be customized for different applications, offering flexibility and improved performance over fixed logic devices. Read more about Programmable Logic Devices on our Programmable Logic part category page.
Part # | Distributor | Description | Stock | Price | Buy | |
---|---|---|---|---|---|---|
DISTI #
122-1707-ND
|
DigiKey | IC CPLD 64MC 6.7NS 100VQFP Min Qty: 1 Lead time: 29 Weeks Container: Tray |
146 In Stock |
|
$14.5600 | Buy Now |
DISTI #
XC2C64A-7VQG100I
|
Avnet Silica | (Alt: XC2C64A-7VQG100I) RoHS: Compliant Min Qty: 49 Package Multiple: 90 Lead time: 143 Weeks, 0 Days | Silica - 0 |
|
Buy Now | |
DISTI #
XC2C64A-7VQG100I
|
EBV Elektronik | (Alt: XC2C64A-7VQG100I) RoHS: Compliant Min Qty: 49 Package Multiple: 90 Lead time: 143 Weeks, 0 Days | EBV - 0 |
|
Buy Now |
By downloading CAD models, you agree to our Terms & Conditions and Privacy Policy
|
XC2C64A-7VQG100I
AMD
Buy Now
Datasheet
|
Compare Parts:
XC2C64A-7VQG100I
AMD
Flash PLD, 7.5ns, 64-Cell, CMOS, PQFP100, 14 X 14 MM, 0.50 MM PITCH, LEAD FREE, VQFP-100
|
Rohs Code | Yes | |
Part Life Cycle Code | Obsolete | |
Ihs Manufacturer | ADVANCED MICRO DEVICES INC | |
Package Description | 14 X 14 MM, 0.50 MM PITCH, LEAD FREE, VQFP-100 | |
Reach Compliance Code | compliant | |
Factory Lead Time | 111 Weeks | |
Samacsys Manufacturer | AMD | |
Additional Feature | REAL DIGITAL DESIGN TECHNOLOGY | |
Clock Frequency-Max | 200 MHz | |
In-System Programmable | YES | |
JESD-30 Code | S-PQFP-G100 | |
JESD-609 Code | e3 | |
JTAG BST | YES | |
Length | 14 mm | |
Moisture Sensitivity Level | 3 | |
Number of Dedicated Inputs | ||
Number of I/O Lines | 64 | |
Number of Macro Cells | 64 | |
Number of Terminals | 100 | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Organization | 0 DEDICATED INPUTS, 64 I/O | |
Output Function | MACROCELL | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | TFQFP | |
Package Equivalence Code | TQFP100,.63SQ | |
Package Shape | SQUARE | |
Package Style | FLATPACK, THIN PROFILE, FINE PITCH | |
Peak Reflow Temperature (Cel) | 260 | |
Programmable Logic Type | FLASH PLD | |
Propagation Delay | 7.5 ns | |
Qualification Status | Not Qualified | |
Seated Height-Max | 1.2 mm | |
Supply Voltage-Max | 1.9 V | |
Supply Voltage-Min | 1.7 V | |
Supply Voltage-Nom | 1.8 V | |
Surface Mount | YES | |
Technology | CMOS | |
Temperature Grade | INDUSTRIAL | |
Terminal Finish | MATTE TIN | |
Terminal Form | GULL WING | |
Terminal Pitch | 0.5 mm | |
Terminal Position | QUAD | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Width | 14 mm |
The maximum operating temperature range for XC2C64A-7VQG100I is -40°C to 100°C (industrial grade) and 0°C to 85°C (commercial grade).
To implement a CDC in XC2C64A-7VQG100I, use a synchronizer circuit or a FIFO-based CDC, and ensure that the clock domains are properly isolated and synchronized.
The maximum frequency achievable with XC2C64A-7VQG100I depends on the design complexity, but typically ranges from 100 MHz to 300 MHz.
To optimize power consumption in XC2C64A-7VQG100I, use power-saving features like clock gating, voltage scaling, and dynamic voltage and frequency scaling (DVFS).
The maximum current draw for XC2C64A-7VQG100I is approximately 1.5 A for the core voltage (VCCINT) and 0.5 A for the I/O voltage (VCCO).