Part Details for PC28F128P33BF60A by Micron Technology Inc
Results Overview of PC28F128P33BF60A by Micron Technology Inc
- Distributor Offerings: (6 listings)
- Number of FFF Equivalents: (0 replacements)
- CAD Models: (Request Part)
- Number of Functional Equivalents: (0 options)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
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PC28F128P33BF60A Information
PC28F128P33BF60A by Micron Technology Inc is a Flash Memory.
Flash Memories are under the broader part category of Memory Components.
Memory components are essential in electronics for computer processing. They can be volatile or non-volatile, depending on the desired function. Read more about Memory Components on our Memory part category page.
Price & Stock for PC28F128P33BF60A
Part # | Distributor | Description | Stock | Price | Buy | |
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Bristol Electronics | 1800 |
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RFQ | ||
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Bristol Electronics | 4 |
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RFQ | ||
DISTI #
SMC-PC28F128P33BF60A
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Sensible Micro Corporation | OEM Excess 5-7 Days Leadtime, We are an AS6081 Certified Vendor, 1 Yr Warranty RoHS: Not Compliant Min Qty: 25 Lead time: 2 Weeks, 0 Days | 19800 |
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RFQ | |
DISTI #
PC28F128P33BF60A
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Avnet Silica | NOR Flash ParallelSerial 25V33V 128Mbit 8M x 16bit 60ns 64Pin BGA Tray (Alt: PC28F128P33BF60A) RoHS: Compliant Min Qty: 300 Package Multiple: 300 Lead time: 143 Weeks, 0 Days | Silica - 0 |
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Buy Now | |
DISTI #
PC28F128P33BF60A
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EBV Elektronik | NOR Flash ParallelSerial 25V33V 128Mbit 8M x 16bit 60ns 64Pin BGA Tray (Alt: PC28F128P33BF60A) RoHS: Compliant Min Qty: 1800 Package Multiple: 1800 | EBV - 0 |
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Buy Now | |
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Vyrian | Memory ICs | 453 |
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RFQ |
Part Details for PC28F128P33BF60A
PC28F128P33BF60A CAD Models
PC28F128P33BF60A Part Data Attributes
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PC28F128P33BF60A
Micron Technology Inc
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Datasheet
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PC28F128P33BF60A
Micron Technology Inc
Flash, 8MX16, 60ns, PBGA64,
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Rohs Code | Yes | |
Part Life Cycle Code | Obsolete | |
Ihs Manufacturer | MICRON TECHNOLOGY INC | |
Package Description | BGA-64 | |
Reach Compliance Code | unknown | |
ECCN Code | EAR99 | |
HTS Code | 8542.32.00.51 | |
Samacsys Manufacturer | Micron | |
Access Time-Max | 60 ns | |
Boot Block | BOTTOM | |
Command User Interface | YES | |
Common Flash Interface | YES | |
Data Polling | NO | |
JESD-30 Code | R-PBGA-B64 | |
JESD-609 Code | e1 | |
Length | 10 mm | |
Memory Density | 134217728 bit | |
Memory IC Type | FLASH | |
Memory Width | 16 | |
Number of Functions | 1 | |
Number of Sectors/Size | 4,127 | |
Number of Terminals | 64 | |
Number of Words | 8388608 words | |
Number of Words Code | 8000000 | |
Operating Mode | SYNCHRONOUS | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Organization | 8MX16 | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | TBGA | |
Package Equivalence Code | BGA64,8X8,40 | |
Package Shape | RECTANGULAR | |
Package Style | GRID ARRAY, THIN PROFILE | |
Page Size | 8 words | |
Parallel/Serial | PARALLEL | |
Peak Reflow Temperature (Cel) | 260 | |
Programming Voltage | 3 V | |
Qualification Status | Not Qualified | |
Seated Height-Max | 1.2 mm | |
Sector Size | 16K,64K | |
Standby Current-Max | 0.002 A | |
Supply Current-Max | 0.028 mA | |
Supply Voltage-Max (Vsup) | 3.6 V | |
Supply Voltage-Min (Vsup) | 2.3 V | |
Supply Voltage-Nom (Vsup) | 3 V | |
Surface Mount | YES | |
Technology | CMOS | |
Temperature Grade | INDUSTRIAL | |
Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) | |
Terminal Form | BALL | |
Terminal Pitch | 1 mm | |
Terminal Position | BOTTOM | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Toggle Bit | NO | |
Type | NOR TYPE | |
Width | 8 mm |
PC28F128P33BF60A Frequently Asked Questions (FAQ)
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The maximum operating temperature range for PC28F128P33BF60A is -40°C to 85°C.
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The hold signal (HOLD#) should be asserted low to pause the current operation and de-asserted high to resume the operation.
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The recommended power-up sequence is to apply VCC first, followed by VPP, and then the clock signal.
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The device density and architecture can be determined by reading the device ID and manufacturer ID through the ID read command.
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The write protect (WP#) signal is used to prevent accidental writes to the device. When WP# is asserted low, the device is write-protected.