Datasheets
M2S090T-1FG676I by:

Field Programmable Gate Array, 86316-Cell, CMOS, PBGA676

Part Details for M2S090T-1FG676I by Microchip Technology Inc

Results Overview of M2S090T-1FG676I by Microchip Technology Inc

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M2S090T-1FG676I Information

M2S090T-1FG676I by Microchip Technology Inc is a Field Programmable Gate Array.
Field Programmable Gate Arrays are under the broader part category of Programmable Logic Devices.

Programmable Logic Devices (PLDs) are reconfigurable digital components that can be customized for different applications, offering flexibility and improved performance over fixed logic devices. Read more about Programmable Logic Devices on our Programmable Logic part category page.

Price & Stock for M2S090T-1FG676I

Part # Distributor Description Stock Price Buy
DISTI # 33AJ8565
Newark Smartfusion2 Soc Fpga, Arm Cortex-M3, 86Kles 676 Pbga 27X27X2.44Mm Tray Rohs Compliant: Yes |Microchip M2S090T-1FG676I RoHS: Compliant Min Qty: 40 Package Multiple: 1 Date Code: 0 Container: Bulk 0
  • 1 $346.9200
  • 50 $341.8800
  • 250 $332.2400
  • 500 $323.1500
$323.1500 / $346.9200 Buy Now
DISTI # M2S090T-1FG676I-ND
DigiKey IC SOC CORTEX-M3 166MHZ 676FBGA Min Qty: 40 Lead time: 12 Weeks Container: Tray Temporarily Out of Stock
  • 40 $346.9210
$346.9210 Buy Now
DISTI # M2S090T-1FG676I
Avnet Americas ACLM2S090T-1FG676I - Trays (Alt: M2S090T-1FG676I) RoHS: Not Compliant Min Qty: 40 Package Multiple: 40 Lead time: 12 Weeks, 0 Days Container: Tray 0
  • 1 $346.9200
  • 50 $341.8800
  • 250 $332.2400
  • 500 $323.1500
$323.1500 / $346.9200 Buy Now
DISTI # 494-M2S090T-1FG676I
Mouser Electronics SoC FPGA SmartFusion2 SoC FPGA, ARM Cortex-M3, 86KLEs RoHS: Not Compliant 33
  • 1 $339.0300
  • 10 $335.8500
$335.8500 / $339.0300 Buy Now
DISTI # M2S090T-1FG676I
Microchip Technology Inc SmartFusion2 SoC FPGA, ARM Cortex-M3, 86KLEs, PBGA, Projected EOL: 2049-02-04 COO: South Korea ECCN: 3A991.d RoHS: Compliant Lead time: 12 Weeks, 0 Days Container: Tray 0

Alternates Available
  • 1 $346.9200
  • 50 $341.8800
  • 250 $332.2400
  • 500 $323.1500
  • 1,000 $181.4600
  • 5,000 $164.9700
$164.9700 / $346.9200 Buy Now
Onlinecomponents.com   RoHS: Compliant 14 In Stock
6 Factory Stock
  • 1 $875.2700
  • 5 $862.1400
  • 10 $849.2000
  • 20 $448.1900
  • 30 $308.2300
  • 40 $302.0700
$302.0700 / $875.2700 Buy Now
DISTI # 87723051
Verical FPGA SmartFusion2 Family 86184 Cells 65nm Technology 1.2V 676-Pin FBGA Tray RoHS: Not Compliant Min Qty: 1 Package Multiple: 1 Date Code: 2328 Americas - 14
  • 1 $1,137.8510
  • 5 $1,120.7820
  • 10 $1,103.9600
  • 20 $582.6470
  • 30 $400.6990
$400.6990 / $1,137.8510 Buy Now
NAC M2S090T-1FG676I RoHS: Compliant Min Qty: 40 Package Multiple: 40 Container: Tray 0
  • 1 $336.9900
  • 100 $310.3800
  • 500 $294.8600
  • 800 $287.6700
$287.6700 / $336.9900 Buy Now
DISTI # M2S090T-1FG676I
Avnet Silica ACLM2S090T1FG676I (Alt: M2S090T-1FG676I) RoHS: Not Compliant Min Qty: 40 Package Multiple: 40 Lead time: 14 Weeks, 0 Days Silica - 0
Buy Now
DISTI # M2S090T-1FG676I
EBV Elektronik ACLM2S090T1FG676I (Alt: M2S090T-1FG676I) RoHS: Not Compliant Min Qty: 40 Package Multiple: 40 Lead time: 13 Weeks, 0 Days EBV - 0
Buy Now
Master Electronics   RoHS: Compliant 14 In Stock
6 Factory Stock
  • 1 $875.2700
  • 5 $862.1400
  • 10 $849.2000
  • 20 $448.1900
  • 30 $308.2300
  • 40 $302.0700
$302.0700 / $875.2700 Buy Now

Part Details for M2S090T-1FG676I

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M2S090T-1FG676I Part Data Attributes

M2S090T-1FG676I Microchip Technology Inc
Buy Now Datasheet
Compare Parts:
M2S090T-1FG676I Microchip Technology Inc Field Programmable Gate Array, 86316-Cell, CMOS, PBGA676
Rohs Code No
Part Life Cycle Code Active
Ihs Manufacturer MICROCHIP TECHNOLOGY INC
Package Description FBGA-676
Reach Compliance Code compliant
HTS Code 8542.31.00.01
Factory Lead Time 12 Weeks
Samacsys Manufacturer Microchip
JESD-30 Code S-PBGA-B676
Length 27 mm
Moisture Sensitivity Level 3
Number of Inputs 425
Number of Logic Cells 86184
Number of Outputs 425
Number of Terminals 676
Operating Temperature-Max 100 °C
Operating Temperature-Min -40 °C
Package Body Material PLASTIC/EPOXY
Package Code BGA
Package Equivalence Code BGA676,26X26,40
Package Shape SQUARE
Package Style GRID ARRAY
Peak Reflow Temperature (Cel) 240
Programmable Logic Type FPGA SOC
Seated Height-Max 2.44 mm
Supply Voltage-Max 1.26 V
Supply Voltage-Min 1.14 V
Supply Voltage-Nom 1.2 V
Surface Mount YES
Terminal Finish TIN LEAD
Terminal Form BALL
Terminal Pitch 1 mm
Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) 30
Width 27 mm

M2S090T-1FG676I Related Parts

M2S090T-1FG676I Frequently Asked Questions (FAQ)

  • Microchip provides a PCB design guide for the M2S090T-1FG676I, which includes recommendations for PCB layout, routing, and signal integrity. It's essential to follow these guidelines to ensure signal integrity and minimize electromagnetic interference (EMI).

  • A reliable POR circuit can be implemented using a voltage supervisor IC, such as the Microchip MCP112-315JE/MS, which can detect the power supply voltage and generate a reset signal to the FPGA. The POR circuit should be designed to ensure that the FPGA is properly reset during power-up and power-down sequences.

  • The M2S090T-1FG676I has a maximum junction temperature of 100°C. To ensure reliable operation, it's essential to implement proper thermal management, including heat sinks, thermal interfaces, and airflow management. Microchip provides thermal modeling and simulation tools to help designers estimate the FPGA's thermal performance.

  • To optimize power consumption, designers should consider using the FPGA's power-saving features, such as clock gating, dynamic voltage and frequency scaling, and power gating. Additionally, optimizing the design's clock frequency, using low-power modes, and minimizing unnecessary logic can help reduce power consumption.

  • The M2S090T-1FG676I has built-in security features, such as secure boot, encryption, and authentication. Designers should consider implementing additional security measures, such as secure key storage, secure communication protocols, and access control mechanisms to protect the FPGA's configuration and data.

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