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Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
CD74AC112E by Texas Instruments is an FF/Latch.
FF/Latches are under the broader part category of Logic Components.
Digital logic governs the behavior of signals in electronic circuits, enabling complex decisions based on simple binary inputs (yes/no). Logic components perform operations from these signals. Read more about Logic Components on our Logic part category page.
Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
296-4223-5-ND
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DigiKey | IC FF JK TYPE DBL 1-BIT 16-PDIP Min Qty: 1 Lead time: 12 Weeks Container: Tube |
790 In Stock |
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$0.2838 / $0.6400 | Buy Now |
DISTI #
595-CD74AC112E
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Mouser Electronics | Flip Flops Dual RoHS: Compliant | 782 |
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$0.4850 / $0.6400 | Buy Now |
DISTI #
86276925
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Verical | Flip Flop JK-Type Neg-Edge 2-Element 16-Pin PDIP Tube RoHS: Compliant Min Qty: 439 Package Multiple: 1 Date Code: 0401 | Americas - 3325 |
|
$0.5303 / $0.8553 | Buy Now |
DISTI #
86277514
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Verical | Flip Flop JK-Type Neg-Edge 2-Element 16-Pin PDIP Tube RoHS: Compliant Min Qty: 439 Package Multiple: 1 Date Code: 1001 | Americas - 3064 |
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$0.5303 / $0.8553 | Buy Now |
DISTI #
86277586
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Verical | Flip Flop JK-Type Neg-Edge 2-Element 16-Pin PDIP Tube RoHS: Compliant Min Qty: 439 Package Multiple: 1 Date Code: 1201 | Americas - 1300 |
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$0.5303 / $0.8553 | Buy Now |
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Rochester Electronics | CD74AC112 Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset RoHS: Compliant Status: Active Min Qty: 1 | 7689 |
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$0.4242 / $0.6842 | Buy Now |
DISTI #
CD74AC112E
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TME | IC: digital, JK flip-flop, Ch: 2, THT, DIP16, tube, AC Min Qty: 1 | 22 |
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$0.3770 / $0.8220 | Buy Now |
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ComSIT USA | Electronic Component RoHS: Not Compliant |
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RFQ |
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CD74AC112E
Texas Instruments
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Datasheet
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CD74AC112E
Texas Instruments
Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125
|
Pbfree Code | Yes | |
Rohs Code | Yes | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | TEXAS INSTRUMENTS INC | |
Part Package Code | DIP | |
Package Description | ROHS COMPLIANT, PLASTIC, DIP-16 | |
Pin Count | 16 | |
Reach Compliance Code | compliant | |
ECCN Code | EAR99 | |
HTS Code | 8542.39.00.01 | |
Samacsys Manufacturer | Texas Instruments | |
Family | AC | |
JESD-30 Code | R-PDIP-T16 | |
JESD-609 Code | e4 | |
Length | 19.3 mm | |
Load Capacitance (CL) | 50 pF | |
Logic IC Type | J-K FLIP-FLOP | |
Max Frequency@Nom-Sup | 71000000 Hz | |
Max I(ol) | 0.024 A | |
Number of Functions | 2 | |
Number of Terminals | 16 | |
Operating Temperature-Max | 125 °C | |
Operating Temperature-Min | -55 °C | |
Output Polarity | COMPLEMENTARY | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | DIP | |
Package Equivalence Code | DIP16,.3 | |
Package Shape | RECTANGULAR | |
Package Style | IN-LINE | |
Packing Method | TUBE | |
Power Supply Current-Max (ICC) | 0.08 mA | |
Prop. Delay@Nom-Sup | 11.1 ns | |
Propagation Delay (tpd) | 129 ns | |
Qualification Status | Not Qualified | |
Schmitt Trigger | NO | |
Seated Height-Max | 5.08 mm | |
Supply Voltage-Max (Vsup) | 5.5 V | |
Supply Voltage-Min (Vsup) | 1.5 V | |
Supply Voltage-Nom (Vsup) | 5 V | |
Surface Mount | NO | |
Technology | CMOS | |
Temperature Grade | MILITARY | |
Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) | |
Terminal Form | THROUGH-HOLE | |
Terminal Pitch | 2.54 mm | |
Terminal Position | DUAL | |
Trigger Type | NEGATIVE EDGE | |
Width | 6.35 mm | |
fmax-Min | 100 MHz |
This table gives cross-reference parts and alternative options found for CD74AC112E. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of CD74AC112E, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
Part Number | Manufacturer | Composite Price | Description | Compare |
---|---|---|---|---|
5962F9670401VEC | Intersil Corporation | Check for Price | AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, CERAMIC, DIP-16 | CD74AC112E vs 5962F9670401VEC |
5962F9670402VEX | Intersil Corporation | Check for Price | AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 | CD74AC112E vs 5962F9670402VEX |
CD74AC112E | Ge Solid State | Check for Price | J-K Flip-Flop, AC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDIP16, PLASTIC, DIP-16 | CD74AC112E vs CD74AC112E |
CD74AC112E | Intersil Corporation | Check for Price | J-K Flip-Flop, 2-Func, Negative Edge Triggered, CMOS, PDIP16 | CD74AC112E vs CD74AC112E |
HD74AC112P | Renesas Electronics Corporation | Check for Price | AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16, DP-16 | CD74AC112E vs HD74AC112P |
CD74AC112EX | Ge Solid State | Check for Price | J-K Flip-Flop, AC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDIP16, PLASTIC, DIP-16 | CD74AC112E vs CD74AC112EX |
TC74AC112P | Toshiba America Electronic Components | Check for Price | IC AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16, 0.300 INCH, 2.54 MM PITCH, LEAD FREE, PLASTIC, DIP-16, FF/Latch | CD74AC112E vs TC74AC112P |
The recommended operating voltage range for the CD74AC112E is 2V to 6V, with a typical voltage of 5V.
The output enable (OE) pin is active-low, meaning that the outputs are enabled when OE is low and disabled when OE is high. You should connect OE to a logic low signal to enable the outputs and a logic high signal to disable them.
The maximum clock frequency that the CD74AC112E can handle is 100 MHz, but this can vary depending on the operating voltage and load conditions.
To ensure proper operation, you should provide a stable power supply to the CD74AC112E, with a decoupling capacitor (typically 0.1 μF) connected between the power supply pins (VCC and GND) and the device. You should also consider adding additional bypass capacitors to the power supply lines to reduce noise and ensure reliable operation.
The propagation delay time for the CD74AC112E is typically around 10 ns, but this can vary depending on the operating voltage, temperature, and load conditions.