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Part Details for CD4027BPWRG4 by Texas Instruments
Results Overview of CD4027BPWRG4 by Texas Instruments
- Distributor Offerings: (1 listing)
- Number of FFF Equivalents: (0 replacements)
- CAD Models: (Available)
- Number of Functional Equivalents: (0 options)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
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Applications
Telecommunications
CD4027BPWRG4 Information
CD4027BPWRG4 by Texas Instruments is an FF/Latch.
FF/Latches are under the broader part category of Logic Components.
Digital logic governs the behavior of signals in electronic circuits, enabling complex decisions based on simple binary inputs (yes/no). Logic components perform operations from these signals. Read more about Logic Components on our Logic part category page.
Price & Stock for CD4027BPWRG4
| Part # | Distributor | Description | Stock | Price | Buy | |
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Vyrian | Logic ICs | 1503 |
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RFQ |
Part Details for CD4027BPWRG4
CD4027BPWRG4 CAD Models
CD4027BPWRG4 Part Data Attributes
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CD4027BPWRG4
Texas Instruments
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CD4027BPWRG4
Texas Instruments
CMOS Dual J-K Master-Slave Flip-Flop 16-TSSOP -55 to 125
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| Rohs Code | No | |
| Part Life Cycle Code | Obsolete | |
| Ihs Manufacturer | TEXAS INSTRUMENTS INC | |
| Part Package Code | TSSOP | |
| Package Description | TSSOP, TSSOP16,.25 | |
| Pin Count | 16 | |
| Reach Compliance Code | compliant | |
| HTS Code | 8542.39.00.01 | |
| Samacsys Manufacturer | Texas Instruments | |
| Family | 4000/14000/40000 | |
| JESD-30 Code | R-PDSO-G16 | |
| JESD-609 Code | e4 | |
| Length | 5 mm | |
| Load Capacitance (CL) | 50 pF | |
| Logic IC Type | J-K FLIP-FLOP | |
| Max Frequency@Nom-Sup | 3500000 Hz | |
| Max I(ol) | 0.0015 A | |
| Moisture Sensitivity Level | 1 | |
| Number of Bits | 2 | |
| Number of Functions | 2 | |
| Number of Terminals | 16 | |
| Operating Temperature-Max | 125 °C | |
| Operating Temperature-Min | -55 °C | |
| Output Polarity | COMPLEMENTARY | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | TSSOP | |
| Package Equivalence Code | TSSOP16,.25 | |
| Package Shape | RECTANGULAR | |
| Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | |
| Packing Method | TR | |
| Peak Reflow Temperature (Cel) | 260 | |
| Power Supply Current-Max (ICC) | 0.6 mA | |
| Prop. Delay@Nom-Sup | 130 ns | |
| Propagation Delay (tpd) | 300 ns | |
| Qualification Status | Not Qualified | |
| Schmitt Trigger | NO | |
| Seated Height-Max | 1.2 mm | |
| Supply Voltage-Max (Vsup) | 18 V | |
| Supply Voltage-Min (Vsup) | 3 V | |
| Supply Voltage-Nom (Vsup) | 5 V | |
| Surface Mount | YES | |
| Technology | CMOS | |
| Temperature Grade | MILITARY | |
| Terminal Finish | NICKEL PALLADIUM GOLD | |
| Terminal Form | GULL WING | |
| Terminal Pitch | 0.65 mm | |
| Terminal Position | DUAL | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Trigger Type | POSITIVE EDGE | |
| Width | 4.4 mm | |
| fmax-Min | 12 MHz |