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128Mbit, 1.7V Minimum SPI Serial Flash Memory with Dual I/O, Quad I/O and QPI Support, WLCSP, 5000/Tape & Reel
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
AT25SL128A-UUE-T by Renesas Electronics Corporation is a Flash Memory.
Flash Memories are under the broader part category of Memory Components.
Memory components are essential in electronics for computer processing. They can be volatile or non-volatile, depending on the desired function. Read more about Memory Components on our Memory part category page.
Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
67AC3409
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Newark | 1.7-3.6V 85C Wlcsp-T&r Rohs Compliant: Yes |Renesas AT25SL128A-UUE-T RoHS: Compliant Min Qty: 5000 Package Multiple: 1 Date Code: 0 Container: Reel | 0 |
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Buy Now | |
DISTI #
1265-1332-1-ND
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DigiKey | IC FLASH 128MBIT SPI 21WLCSP Min Qty: 1 Lead time: 18 Weeks Container: Digi-Reel®, Cut Tape (CT), Tape & Reel (TR) | Temporarily Out of Stock |
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$1.3022 / $1.7700 | Buy Now |
DISTI #
AT25SL128A-UUE-T
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Avnet Americas | - Tape and Reel (Alt: AT25SL128A-UUE-T) RoHS: Compliant Min Qty: 5000 Package Multiple: 5000 Lead time: 18 Weeks, 0 Days Container: Reel | 0 |
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$1.7600 | Buy Now |
DISTI #
988-AT25SL128A-UUE-T
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Mouser Electronics | NOR Flash 128 Mbit, 1.8V (1.7V to 2V), -40C to 85C, WLCSP (Tape & Reel), Single, Dual, Quad SPI NOR flash RoHS: Compliant | 14761 |
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$1.4100 / $2.0500 | Buy Now |
DISTI #
AT25SL128A-UUE-T
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Avnet Silica | (Alt: AT25SL128A-UUE-T) RoHS: Compliant Min Qty: 5000 Package Multiple: 5000 Lead time: 19 Weeks, 0 Days | Silica - 0 |
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Buy Now |
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AT25SL128A-UUE-T
Renesas Electronics Corporation
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Datasheet
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AT25SL128A-UUE-T
Renesas Electronics Corporation
128Mbit, 1.7V Minimum SPI Serial Flash Memory with Dual I/O, Quad I/O and QPI Support, WLCSP, 5000/Tape & Reel
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Pbfree Code | Yes | |
Rohs Code | Yes | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | RENESAS ELECTRONICS CORP | |
Part Package Code | WLCSP | |
Package Description | WLCSP-8 | |
Reach Compliance Code | compliant | |
Factory Lead Time | 18 Weeks | |
Samacsys Manufacturer | Renesas Electronics | |
Clock Frequency-Max (fCLK) | 133 MHz | |
Data Retention Time-Min | 20 | |
Endurance | 100000 Write/Erase Cycles | |
JESD-30 Code | R-PBGA-B21 | |
JESD-609 Code | e1 | |
Length | 3.29 mm | |
Memory Density | 134217728 bit | |
Memory IC Type | FLASH | |
Memory Width | 8 | |
Moisture Sensitivity Level | 1 | |
Number of Functions | 1 | |
Number of Terminals | 21 | |
Number of Words | 16777216 words | |
Number of Words Code | 16000000 | |
Operating Mode | SYNCHRONOUS | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Organization | 16MX8 | |
Output Characteristics | 3-STATE | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | VFBGA | |
Package Equivalence Code | BGA21,6X6,20 | |
Package Shape | RECTANGULAR | |
Package Style | GRID ARRAY, VERY THIN PROFILE, FINE PITCH | |
Parallel/Serial | SERIAL | |
Programming Voltage | 1.8 V | |
Seated Height-Max | 0.528 mm | |
Serial Bus Type | QSPI | |
Standby Current-Max | 0.00007 A | |
Supply Current-Max | 0.027 mA | |
Supply Voltage-Max (Vsup) | 2 V | |
Supply Voltage-Min (Vsup) | 1.7 V | |
Supply Voltage-Nom (Vsup) | 1.8 V | |
Surface Mount | YES | |
Technology | CMOS | |
Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) | |
Terminal Form | BALL | |
Terminal Pitch | 0.5 mm | |
Terminal Position | BOTTOM | |
Type | NOR TYPE | |
Width | 3.022 mm | |
Write Protection | HARDWARE/SOFTWARE |
The AT25SL128A-UUE-T has a maximum of 100,000 erase cycles per sector, and 10,000 erase cycles per block.
The AT25SL128A-UUE-T has a 256-byte page write buffer. If the buffer overflows, the device will automatically wrap around to the beginning of the page and continue writing data.
The WP# (Write Protect) pin is used to prevent writes to the status register and the first 256 bytes of the memory array. When WP# is low, the device is in write-protect mode.
Yes, the AT25SL128A-UUE-T supports multi-master SPI bus systems. It has a built-in slave select (SS#) pin that allows it to be used in systems with multiple SPI masters.
The recommended power-up sequence is to apply VCC first, followed by the clock signal (SCK), and then the chip select (CS#) and other input signals.