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16-Bit, 100 kSPS, Serial I/O A/D Converter
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
AD977BRZRL by Analog Devices Inc is an Analog to Digital Converter.
Analog to Digital Converters are under the broader part category of Converters.
A converter is an electrical circuit that transforms electric energy into a different form that will support a elecrical load needed by a device. Read more about Converters on our Converters part category page.
Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
AD977BRZRLTR-ND
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DigiKey | IC ADC 16BIT SAR 20SOIC Min Qty: 1000 Lead time: 10 Weeks Container: Tape & Reel (TR) | Temporarily Out of Stock |
|
$55.2684 | Buy Now |
DISTI #
AD977BRZRL
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Richardson RFPD | CONVERTER - ADC RoHS: Compliant Min Qty: 1 | 0 |
|
RFQ | |
|
Vyrian | Converters | 919 |
|
RFQ | |
|
Win Source Electronics | IC ADC 16BIT 100KSPS 20SOIC | 1299 |
|
$72.9902 / $89.8336 | Buy Now |
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AD977BRZRL
Analog Devices Inc
Buy Now
Datasheet
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Compare Parts:
AD977BRZRL
Analog Devices Inc
16-Bit, 100 kSPS, Serial I/O A/D Converter
|
Pbfree Code | No | |
Rohs Code | Yes | |
Part Life Cycle Code | Not Recommended | |
Ihs Manufacturer | ANALOG DEVICES INC | |
Part Package Code | SOIC | |
Pin Count | 20 | |
Manufacturer Package Code | RW-20 | |
Reach Compliance Code | compliant | |
ECCN Code | EAR99 | |
HTS Code | 8542.39.00.01 | |
Samacsys Manufacturer | Analog Devices | |
Analog Input Voltage-Max | 10 V | |
Analog Input Voltage-Min | -10 V | |
Conversion Time-Max | 8 µs | |
Converter Type | ADC, SUCCESSIVE APPROXIMATION | |
JESD-30 Code | R-PDSO-G20 | |
JESD-609 Code | e3 | |
Length | 12.8 mm | |
Linearity Error-Max (EL) | 0.0031% | |
Moisture Sensitivity Level | 3 | |
Number of Analog In Channels | 3 | |
Number of Bits | 16 | |
Number of Functions | 1 | |
Number of Terminals | 20 | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Output Bit Code | BINARY, 2'S COMPLEMENT BINARY | |
Output Format | SERIAL | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | SOP | |
Package Equivalence Code | SOP20,.4 | |
Package Shape | RECTANGULAR | |
Package Style | SMALL OUTLINE | |
Peak Reflow Temperature (Cel) | 260 | |
Qualification Status | Not Qualified | |
Sample Rate | 0.1 MHz | |
Seated Height-Max | 2.65 mm | |
Supply Voltage-Nom | 5 V | |
Surface Mount | YES | |
Technology | BICMOS | |
Temperature Grade | INDUSTRIAL | |
Terminal Finish | Matte Tin (Sn) | |
Terminal Form | GULL WING | |
Terminal Pitch | 1.27 mm | |
Terminal Position | DUAL | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Width | 7.5 mm |
This table gives cross-reference parts and alternative options found for AD977BRZRL. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of AD977BRZRL, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
Part Number | Manufacturer | Composite Price | Description | Compare |
---|---|---|---|---|
AD977BR | Analog Devices Inc | $43.1824 | 16-Bit, 100 kSPS, Serial I/O A/D Converter | AD977BRZRL vs AD977BR |
AD977BRZ | Analog Devices Inc | Check for Price | 16-Bit, 100 kSPS, Serial I/O A/D Converter | AD977BRZRL vs AD977BRZ |
AD977CRZ | Analog Devices Inc | Check for Price | 16-Bit, 100 kSPS, Serial I/O A/D Converter | AD977BRZRL vs AD977CRZ |
The recommended power-up sequence is to apply VCC first, followed by AVCC, and then the analog input signals. This ensures proper device operation and prevents latch-up.
To optimize performance, use a low-noise power supply, decouple the power pins with capacitors, and use a ground plane to reduce noise coupling. Additionally, use a low-pass filter at the analog input to reduce high-frequency noise.
The AD977BRZRL can support clock frequencies up to 65 MSPS. However, the maximum clock frequency may vary depending on the specific application and operating conditions.
To ensure data integrity, use a robust clocking scheme, implement data error correction mechanisms, and ensure that the data transmission lines are properly terminated to minimize signal reflections and noise.
To minimize noise and signal degradation, use a star-grounding scheme, keep analog and digital signals separate, and use shielded cables or twisted pairs for signal transmission. Additionally, avoid routing digital signals near analog signals.