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16-Bit, 25 MSPS/65 MSPS/80 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
AD9650BCPZRL7-80 by Analog Devices Inc is an Analog to Digital Converter.
Analog to Digital Converters are under the broader part category of Converters.
A converter is an electrical circuit that transforms electric energy into a different form that will support a elecrical load needed by a device. Read more about Converters on our Converters part category page.
Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
AD9650BCPZRL7-80TR-ND
|
DigiKey | IC ADC 16BIT PIPELINED 64LFCSP Min Qty: 750 Lead time: 10 Weeks Container: Tape & Reel (TR) | Temporarily Out of Stock |
|
$198.7125 | Buy Now |
DISTI #
584-AD9650BCPZR7-80
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Mouser Electronics | Analog to Digital Converters - ADC 16Bit Hi SNR 80 Msps Dual ADC RoHS: Compliant | 0 |
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$198.7200 | Order Now |
DISTI #
63063448
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Verical | 2-Channel Dual ADC Pipelined 80Msps 16-bit Parallel 64-Pin LFCSP EP T/R RoHS: Compliant Min Qty: 750 Package Multiple: 750 | Americas - 750 |
|
$196.6234 | Buy Now |
DISTI #
AD9650BCPZR7-80
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Richardson RFPD | CONVERTER - ADC RoHS: Compliant Min Qty: 750 | 0 |
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$202.6800 | Buy Now |
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Vyrian | Converters | 372 |
|
RFQ |
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AD9650BCPZRL7-80
Analog Devices Inc
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Datasheet
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AD9650BCPZRL7-80
Analog Devices Inc
16-Bit, 25 MSPS/65 MSPS/80 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
|
Pbfree Code | No | |
Rohs Code | Yes | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | ANALOG DEVICES INC | |
Part Package Code | QFN | |
Package Description | 9 X 9 MM, ROHS COMPLIANT, MO-220VMMD-4, LFCSP-64 | |
Pin Count | 64 | |
Manufacturer Package Code | CP-64-6 | |
Reach Compliance Code | compliant | |
ECCN Code | 3A001.A.5.A.5 | |
HTS Code | 8542.39.00.01 | |
Samacsys Manufacturer | Analog Devices | |
Analog Input Voltage-Max | 2.7 V | |
Analog Input Voltage-Min | -2.7 V | |
Conversion Time-Max | 0.05 µs | |
Converter Type | ADC, FLASH METHOD | |
JESD-30 Code | S-XQCC-N64 | |
JESD-609 Code | e3 | |
Length | 9 mm | |
Linearity Error-Max (EL) | 0.0092% | |
Moisture Sensitivity Level | 3 | |
Number of Analog In Channels | 2 | |
Number of Bits | 16 | |
Number of Functions | 1 | |
Number of Terminals | 64 | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Output Bit Code | OFFSET BINARY, 2'S COMPLEMENT BINARY, GRAY CODE | |
Output Format | PARALLEL, WORD | |
Package Body Material | UNSPECIFIED | |
Package Code | HVQCCN | |
Package Equivalence Code | LCC64,.35SQ,20 | |
Package Shape | SQUARE | |
Package Style | CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE | |
Peak Reflow Temperature (Cel) | 260 | |
Qualification Status | Not Qualified | |
Sample Rate | 80 MHz | |
Sample and Hold / Track and Hold | SAMPLE | |
Seated Height-Max | 1 mm | |
Supply Voltage-Nom | 1.8 V | |
Surface Mount | YES | |
Technology | CMOS | |
Temperature Grade | INDUSTRIAL | |
Terminal Finish | Matte Tin (Sn) | |
Terminal Form | NO LEAD | |
Terminal Pitch | 0.5 mm | |
Terminal Position | QUAD | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Width | 9 mm |
This table gives cross-reference parts and alternative options found for AD9650BCPZRL7-80. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of AD9650BCPZRL7-80, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
Part Number | Manufacturer | Composite Price | Description | Compare |
---|---|---|---|---|
AD9650BCPZ-80 | Analog Devices Inc | Check for Price | 16-Bit, 25 MSPS/65 MSPS/80 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC) | AD9650BCPZRL7-80 vs AD9650BCPZ-80 |
A good PCB layout is crucial for the AD9650's performance. Analog Devices recommends a 4-layer PCB with a solid ground plane, and to keep the analog and digital sections separate. The datasheet provides a recommended layout, but it's also recommended to consult with a PCB design expert and to follow good high-speed design practices.
The clock input is critical for the AD9650's performance. It's recommended to use a low-jitter clock source, and to AC-couple the clock input to the AD9650. The clock signal should be terminated with a 50Ω resistor to match the impedance of the clock input. Additionally, the clock frequency should be set to the desired sampling rate, and the clock duty cycle should be set to 50%.
The maximum input bandwidth of the AD9650 is 1.4 GHz, but it's recommended to limit the input bandwidth to 1.2 GHz to ensure optimal performance. The input bandwidth can be limited using an external filter or by adjusting the gain of the analog input stage.
The AD9650 has an internal calibration circuit that can be used to calibrate the device. The calibration process involves setting the CAL pin high and then low, and then reading the calibration data from the device. The calibration data can be used to adjust the gain and offset of the analog input stage. It's recommended to consult the datasheet for the specific calibration procedure.
The power consumption of the AD9650 depends on the operating conditions, but typically it's around 1.2W at a sampling rate of 80 MSPS. The power consumption can be reduced by reducing the sampling rate or by using the device's power-down mode.