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Part Details for AD9648BCPZ-105 by Analog Devices Inc
Results Overview of AD9648BCPZ-105 by Analog Devices Inc
- Distributor Offerings: (7 listings)
- Number of FFF Equivalents: (0 replacements)
- CAD Models: (Available)
- Number of Functional Equivalents: (0 options)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
AD9648BCPZ-105 Information
AD9648BCPZ-105 by Analog Devices Inc is an Analog to Digital Converter.
Analog to Digital Converters are under the broader part category of Converters.
A converter is an electrical circuit that transforms electric energy into a different form that will support a elecrical load needed by a device. Read more about Converters on our Converters part category page.
Price & Stock for AD9648BCPZ-105
| Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
54AK0013
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Newark | Adc, 14Bit, 105Msps, Lfcsp-Vq-Ep-64, Resolution (Bits):14Bit, Sampling Rate:105Msps, Input Channel Type:Differential, Data Interface:Serial, Spi, Supply Voltage Type:Single, Supply Voltage Min:1.7V, Supply Voltage Max:1.9V Rohs Compliant: Yes |Analog Devices AD9648BCPZ-105 RoHS: Compliant Min Qty: 1 Package Multiple: 1 Date Code: 1 Container: Bulk | 6 |
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$72.5300 / $96.7300 | Buy Now |
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DISTI #
505-AD9648BCPZ-105-ND
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DigiKey | IC ADC 14BIT PIPELINED 64LFCSP Min Qty: 1 Lead time: 10 Weeks Container: Tray |
8 In Stock |
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$73.1250 / $87.4700 | Buy Now |
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DISTI #
584-AD9648BCPZ-105
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Mouser Electronics | Analog to Digital Converters - ADC 14Bit105MSPS Dual 1.8V ADC parallel LVDS RoHS: Compliant | 0 |
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$75.8200 / $96.5000 | Order Now |
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Analog Devices Inc | 14Bit105MSPS Dual 1.8V ADC par Package Multiple: 1 | 2 |
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$54.3000 / $87.4700 | Buy Now |
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DISTI #
AD9648BCPZ-105
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Richardson RFPD | CONVERTER - ADC RoHS: Compliant Min Qty: 8 | 0 |
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$76.5000 / $87.7500 | Buy Now |
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LCSC | 14Bit 1.7V1.9V 105MHz LFCSP-64(9x9) Analog to Digital Converters (ADC) ROHS | 3 |
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$82.4357 / $86.3911 | Buy Now |
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Vyrian | Converters | 77 |
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RFQ |
Part Details for AD9648BCPZ-105
AD9648BCPZ-105 CAD Models
AD9648BCPZ-105 Part Data Attributes
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AD9648BCPZ-105
Analog Devices Inc
Buy Now
Datasheet
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Compare Parts:
AD9648BCPZ-105
Analog Devices Inc
14-Bit, 125 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter
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| Pbfree Code | No | |
| Rohs Code | Yes | |
| Part Life Cycle Code | Active | |
| Ihs Manufacturer | ANALOG DEVICES INC | |
| Part Package Code | QFN | |
| Package Description | 9 X 9 MM, ROHS COMPLIANT, MO-220VMMD-4, LFCSP-64 | |
| Pin Count | 64 | |
| Manufacturer Package Code | CP-64-4 | |
| Reach Compliance Code | compliant | |
| ECCN Code | 3A991.C.3 | |
| HTS Code | 8542.39.00.01 | |
| Samacsys Manufacturer | Analog Devices | |
| Analog Input Voltage-Max | 2 V | |
| Analog Input Voltage-Min | -2 V | |
| Conversion Time-Max | 0.00952 µs | |
| Converter Type | ADC, FLASH METHOD | |
| JESD-30 Code | S-XQCC-N64 | |
| JESD-609 Code | e3 | |
| Length | 9 mm | |
| Linearity Error-Max (EL) | 0.014% | |
| Moisture Sensitivity Level | 3 | |
| Number of Analog In Channels | 2 | |
| Number of Bits | 14 | |
| Number of Functions | 1 | |
| Number of Terminals | 64 | |
| Operating Temperature-Max | 85 °C | |
| Operating Temperature-Min | -40 °C | |
| Output Bit Code | OFFSET BINARY, 2'S COMPLEMENT BINARY, GRAY CODE | |
| Output Format | SERIAL | |
| Package Body Material | UNSPECIFIED | |
| Package Code | HVQCCN | |
| Package Equivalence Code | LCC64,.35SQ,20 | |
| Package Shape | SQUARE | |
| Package Style | CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE | |
| Qualification Status | Not Qualified | |
| Sample Rate | 105 MHz | |
| Seated Height-Max | 1 mm | |
| Supply Voltage-Nom | 1.8 V | |
| Surface Mount | YES | |
| Technology | CMOS | |
| Temperature Grade | INDUSTRIAL | |
| Terminal Finish | Matte Tin (Sn) | |
| Terminal Form | NO LEAD | |
| Terminal Pitch | 0.5 mm | |
| Terminal Position | QUAD | |
| Width | 9 mm |
AD9648BCPZ-105 Frequently Asked Questions (FAQ)
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A 4-layer PCB with a solid ground plane and a separate analog and digital power plane is recommended. Keep the analog and digital signals separate and avoid crossing them over each other. Use a common mode filter and a low-pass filter to reduce noise.
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Use a low-jitter clock source (<100 ps RMS) and a clock signal with a 50% duty cycle. Ensure the clock signal is properly terminated and use a clock buffer to reduce jitter. Also, use a clock signal with a frequency that is a multiple of the ADC's sampling frequency.
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Power up the analog supply (AVDD) first, followed by the digital supply (DVDD), and then the clock signal. Ensure that the clock signal is stable before applying the analog input signal.
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Use a FIFO or a buffer to handle the output data and ensure that the data is read at a rate that is at least twice the ADC's sampling frequency. Use a data valid signal to ensure that the data is valid before processing it.
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Perform a full-scale calibration after power-up and after any changes to the analog input signal. Use the ADC's built-in calibration mode and follow the recommended calibration procedure outlined in the datasheet.