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14-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
AD9643BCPZ-210 by Analog Devices Inc is an Analog to Digital Converter.
Analog to Digital Converters are under the broader part category of Converters.
A converter is an electrical circuit that transforms electric energy into a different form that will support a elecrical load needed by a device. Read more about Converters on our Converters part category page.
Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
4297836
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Farnell | ADC, 14BIT, 210MSPS, -40 TO 85DEG C RoHS: Compliant Min Qty: 1 Lead time: 11 Weeks, 1 Days Container: Each | 3 |
|
$200.9248 / $221.3819 | Buy Now |
DISTI #
505-AD9643BCPZ-210-ND
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DigiKey | IC ADC 14BIT PIPELINED 64LFCSP Min Qty: 1 Lead time: 20 Weeks Container: Tray |
2 In Stock |
|
$189.7500 / $194.8700 | Buy Now |
DISTI #
584-AD9643BCPZ-210
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Mouser Electronics | Analog to Digital Converters - ADC 14 Bit 210Msps Dual ADC RoHS: Compliant | 3 |
|
$188.4000 / $204.5700 | Buy Now |
DISTI #
V99:2348_06216593
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Arrow Electronics | 2-Channel Dual ADC Pipelined 210Msps 14-bit Parallel 64-Pin LFCSP EP Tray RoHS: Compliant Min Qty: 1 Package Multiple: 1 Lead time: 10 Weeks Date Code: 2224 | Americas - 6 |
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$192.6500 | Buy Now |
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Analog Devices Inc | 14 Bit 210Msps Dual ADC Package Multiple: 1 | 1 |
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$140.9100 / $194.8700 | Buy Now |
DISTI #
62506672
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Verical | 2-Channel Dual ADC Pipelined 210Msps 14-bit Parallel 64-Pin LFCSP EP Tray RoHS: Compliant Min Qty: 1 Package Multiple: 1 Date Code: 2224 | Americas - 6 |
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$237.2447 | Buy Now |
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Bristol Electronics | 2 |
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RFQ | ||
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Quest Components | 1 |
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$263.4520 | Buy Now | |
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Rochester Electronics | ADC, Flash Method, 14-Bit, 2 Channel, Parallel, Word Access RoHS: Compliant Status: Active Min Qty: 1 | 270 |
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$159.7900 / $181.5800 | Buy Now |
DISTI #
AD9643BCPZ-210
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Richardson RFPD | CONVERTER - ADC RoHS: Compliant Min Qty: 3 | 0 |
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$193.5500 / $203.7300 | Buy Now |
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AD9643BCPZ-210
Analog Devices Inc
Buy Now
Datasheet
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Compare Parts:
AD9643BCPZ-210
Analog Devices Inc
14-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
|
Pbfree Code | No | |
Rohs Code | Yes | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | ANALOG DEVICES INC | |
Part Package Code | QFN | |
Pin Count | 64 | |
Manufacturer Package Code | CP-64-4 | |
Reach Compliance Code | compliant | |
ECCN Code | 3A991.C.3 | |
HTS Code | 8542.39.00.01 | |
Samacsys Manufacturer | Analog Devices | |
Analog Input Voltage-Max | 1.75 V | |
Analog Input Voltage-Min | ||
Conversion Time-Max | 0.0047 µs | |
Converter Type | ADC, FLASH METHOD | |
JESD-30 Code | S-XQCC-N64 | |
JESD-609 Code | e3 | |
Length | 9 mm | |
Linearity Error-Max (EL) | 0.0122% | |
Moisture Sensitivity Level | 3 | |
Number of Analog In Channels | 2 | |
Number of Bits | 14 | |
Number of Functions | 1 | |
Number of Terminals | 64 | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Output Bit Code | OFFSET BINARY, 2'S COMPLEMENT BINARY, GRAY CODE | |
Output Format | PARALLEL, WORD | |
Package Body Material | UNSPECIFIED | |
Package Code | HVQCCN | |
Package Equivalence Code | LCC64,.35SQ,20 | |
Package Shape | SQUARE | |
Package Style | CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE | |
Peak Reflow Temperature (Cel) | 260 | |
Qualification Status | Not Qualified | |
Sample Rate | 210 MHz | |
Sample and Hold / Track and Hold | SAMPLE | |
Seated Height-Max | 1 mm | |
Supply Voltage-Nom | 1.8 V | |
Surface Mount | YES | |
Temperature Grade | INDUSTRIAL | |
Terminal Finish | Matte Tin (Sn) | |
Terminal Form | NO LEAD | |
Terminal Pitch | 0.5 mm | |
Terminal Position | QUAD | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Width | 9 mm |
A 4-layer PCB with a solid ground plane and a separate analog and digital power plane is recommended. Keep the analog and digital signals separate and avoid crossing them over each other. Use a common mode filter and a low-pass filter to reduce noise.
Use a low-jitter clock source (<100 ps) and a clock frequency that is a multiple of the sampling frequency. Use a clock buffer or a clock distribution network to ensure a clean clock signal. Avoid using a clock signal with a high harmonic content.
Power up the analog supply (AVDD) first, followed by the digital supply (DVDD), and then the clock signal. Ensure that the power supplies are stable before applying the clock signal.
Use a FIFO or a buffer to handle the output data, as the AD9643BCPZ-210 outputs data at a high rate. Ensure that the receiving device can handle the data rate and format.
Perform a full-scale calibration after power-up, and then perform a zero-scale calibration. Use the on-chip calibration registers to adjust the offset and gain of the ADC.