-
Part Symbol
-
Footprint
-
3D Model
Available Download Formats
By downloading CAD models, you agree to our Terms & Conditions and Privacy Policy
Automotive 8-bit parallel-load shift registers 16-TSSOP -40 to 125
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
SN74HCS165QPWRQ1 by Texas Instruments is a Shift Register.
Shift Registers are under the broader part category of Logic Components.
Digital logic governs the behavior of signals in electronic circuits, enabling complex decisions based on simple binary inputs (yes/no). Logic components perform operations from these signals. Read more about Logic Components on our Logic part category page.
Part # | Distributor | Description | Stock | Price | Buy | |
---|---|---|---|---|---|---|
DISTI #
296-SN74HCS165QPWRQ1CT-ND
|
DigiKey | AUTOMOTIVE 8-BIT PARALLEL-LOAD S Min Qty: 1 Lead time: 6 Weeks Container: Digi-Reel®, Cut Tape (CT), Tape & Reel (TR) |
3949 In Stock |
|
$0.2612 / $0.6200 | Buy Now |
DISTI #
595-SN74HCS165QPWRQ1
|
Mouser Electronics | Counter Shift Registers Automotive 8-bit par allel-load shift reg RoHS: Compliant | 2523 |
|
$0.2600 / $0.6200 | Buy Now |
|
LCSC | 8 2V6V 1 Parallel or Serial to Serial TSSOP-16 Shift Registers ROHS | 136 |
|
$0.4981 / $0.5238 | Buy Now |
|
Vyrian | Logic ICs | 5630 |
|
RFQ |
By downloading CAD models, you agree to our Terms & Conditions and Privacy Policy
|
SN74HCS165QPWRQ1
Texas Instruments
Buy Now
Datasheet
|
Compare Parts:
SN74HCS165QPWRQ1
Texas Instruments
Automotive 8-bit parallel-load shift registers 16-TSSOP -40 to 125
|
Pbfree Code | Yes | |
Rohs Code | Yes | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | TEXAS INSTRUMENTS INC | |
Package Description | TSSOP-16 | |
Reach Compliance Code | compliant | |
ECCN Code | EAR99 | |
HTS Code | 8542.39.00.01 | |
Date Of Intro | 2020-08-16 | |
Samacsys Manufacturer | Texas Instruments | |
Count Direction | RIGHT | |
Family | HC/UH | |
JESD-30 Code | R-PDSO-G16 | |
JESD-609 Code | e4 | |
Length | 5 mm | |
Load Capacitance (CL) | 50 pF | |
Logic IC Type | PARALLEL IN SERIAL OUT | |
Max Frequency@Nom-Sup | 120000000 Hz | |
Max I(ol) | 0.0078 A | |
Moisture Sensitivity Level | 1 | |
Number of Bits | 8 | |
Number of Functions | 1 | |
Number of Terminals | 16 | |
Operating Temperature-Max | 125 °C | |
Operating Temperature-Min | -40 °C | |
Output Polarity | COMPLEMENTARY | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | TSSOP | |
Package Equivalence Code | TSSOP16,.25 | |
Package Shape | RECTANGULAR | |
Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | |
Packing Method | TR | |
Peak Reflow Temperature (Cel) | 260 | |
Power Supply Current-Max (ICC) | 0.002 mA | |
Propagation Delay (tpd) | 45 ns | |
Schmitt Trigger | YES | |
Screening Level | AEC-Q100 | |
Seated Height-Max | 1.2 mm | |
Supply Voltage-Max (Vsup) | 6 V | |
Supply Voltage-Min (Vsup) | 2 V | |
Supply Voltage-Nom (Vsup) | 5 V | |
Surface Mount | YES | |
Technology | CMOS | |
Temperature Grade | AUTOMOTIVE | |
Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) | |
Terminal Form | GULL WING | |
Terminal Pitch | 0.65 mm | |
Terminal Position | DUAL | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Trigger Type | POSITIVE EDGE | |
Width | 4.4 mm | |
fmax-Min | 150 MHz |
The maximum clock frequency of the SN74HCS165QPWRQ1 is 25 MHz, but it can vary depending on the operating voltage and temperature. It's recommended to check the timing characteristics in the datasheet for specific frequency limits.
To ensure proper power and decoupling, connect the VCC pin to a stable 2.0-V to 5.5-V power supply, and decouple the power pins with 0.1-μF ceramic capacitors. Additionally, use a 10-μF capacitor for bulk decoupling.
The maximum input voltage that the SN74HCS165QPWRQ1 can tolerate is 5.5 V, but it's recommended to keep the input voltage within the recommended operating range of 2.0 V to 5.5 V to ensure reliable operation.
The asynchronous clear (CLR) input should be tied to VCC through a pull-up resistor (e.g., 1 kΩ) to ensure that it's not floating. This input is active-low, so it should be driven low to clear the shift register.
To minimize signal integrity issues, keep the clock signal traces short and away from noisy signals. Use a solid ground plane and decouple the power pins as close to the device as possible. Avoid vias and sharp corners in the signal traces.