Part Details for M2GL060T-FGG676I by Microchip Technology Inc
Results Overview of M2GL060T-FGG676I by Microchip Technology Inc
- Distributor Offerings: (10 listings)
- Number of FFF Equivalents: (1 replacement)
- CAD Models: (Request Part)
- Number of Functional Equivalents: (2 options)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
Applications
Computing and Data Storage
M2GL060T-FGG676I Information
M2GL060T-FGG676I by Microchip Technology Inc is a Field Programmable Gate Array.
Field Programmable Gate Arrays are under the broader part category of Programmable Logic Devices.
Programmable Logic Devices (PLDs) are reconfigurable digital components that can be customized for different applications, offering flexibility and improved performance over fixed logic devices. Read more about Programmable Logic Devices on our Programmable Logic part category page.
Price & Stock for M2GL060T-FGG676I
| Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
33AJ7960
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Newark | Igloo2 Low Density Fpga, 56.5Kles 676 Pbga 27X27X2.44Mm Tray Rohs Compliant: Yes |Microchip M2GL060T-FGG676I RoHS: Compliant Min Qty: 40 Package Multiple: 1 Date Code: 0 Container: Bulk | 0 |
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$121.1300 / $134.0400 | Buy Now |
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DISTI #
1100-1337-ND
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DigiKey | IC FPGA 387 I/O 676FBGA Min Qty: 1 Lead time: 12 Weeks Container: Tray |
45 In Stock |
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$134.0408 / $143.6200 | Buy Now |
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DISTI #
M2GL060T-FGG676I
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Avnet Americas | - Trays (Alt: M2GL060T-FGG676I) RoHS: Compliant Min Qty: 40 Package Multiple: 40 Lead time: 12 Weeks, 0 Days Container: Tray | 0 |
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$117.6319 / $125.6750 | Buy Now |
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DISTI #
494-M2GL060T-FGG676I
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Mouser Electronics | FPGA - Field Programmable Gate Array IGLOO2 Low Density FPGA, 56.5KLEs RoHS: Compliant | 33 |
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$129.7900 / $143.6200 | Buy Now |
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DISTI #
M2GL060T-FGG676I
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Microchip Technology Inc | IGLOO2 Low Density FPGA, 56.5KLEs, PBGA, Projected EOL: 2049-02-04 COO: South Korea ECCN: 3A991.d RoHS: Compliant Lead time: 12 Weeks, 0 Days Container: Tray |
0 Alternates Available |
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$70.3000 / $143.6200 | Buy Now |
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Onlinecomponents.com | RoHS: Compliant | 0 |
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$124.8000 / $341.8400 | Buy Now |
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NAC | M2GL060T-FGG676I RoHS: Compliant Min Qty: 40 Package Multiple: 40 Container: Tray | 0 |
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$122.6100 / $143.6300 | Buy Now |
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NexGen Digital | 1388 |
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RFQ | ||
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DISTI #
M2GL060T-FGG676I
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Avnet Silica | (Alt: M2GL060T-FGG676I) RoHS: Compliant Min Qty: 40 Package Multiple: 40 Lead time: 14 Weeks, 0 Days | Silica - 0 |
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Buy Now | |
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Master Electronics | RoHS: Compliant | 0 |
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$124.8000 / $341.8400 | Buy Now |
Part Details for M2GL060T-FGG676I
M2GL060T-FGG676I CAD Models
M2GL060T-FGG676I Part Data Attributes
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M2GL060T-FGG676I
Microchip Technology Inc
Buy Now
Datasheet
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Compare Parts:
M2GL060T-FGG676I
Microchip Technology Inc
Field Programmable Gate Array, PBGA676
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| Rohs Code | Yes | |
| Part Life Cycle Code | Active | |
| Ihs Manufacturer | MICROCHIP TECHNOLOGY INC | |
| Package Description | FBGA-676 | |
| Reach Compliance Code | compliant | |
| HTS Code | 8542.39.00.01 | |
| Factory Lead Time | 12 Weeks | |
| JESD-30 Code | S-PBGA-B676 | |
| Length | 27 mm | |
| Moisture Sensitivity Level | 3 | |
| Number of Inputs | 387 | |
| Number of Outputs | 387 | |
| Number of Terminals | 676 | |
| Operating Temperature-Max | 100 °C | |
| Operating Temperature-Min | -40 °C | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | BGA | |
| Package Equivalence Code | BGA676,26X26,40 | |
| Package Shape | SQUARE | |
| Package Style | GRID ARRAY | |
| Packing Method | TRAY | |
| Peak Reflow Temperature (Cel) | 250 | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Seated Height-Max | 2.44 mm | |
| Supply Voltage-Max | 1.26 V | |
| Supply Voltage-Min | 1.14 V | |
| Supply Voltage-Nom | 1.2 V | |
| Surface Mount | YES | |
| Temperature Grade | INDUSTRIAL | |
| Terminal Form | BALL | |
| Terminal Pitch | 1 mm | |
| Terminal Position | BOTTOM | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Width | 27 mm |
Alternate Parts for M2GL060T-FGG676I
This table gives cross-reference parts and alternative options found for M2GL060T-FGG676I. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of M2GL060T-FGG676I, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
| Part Number | Manufacturer | Composite Price | Description | Compare |
|---|---|---|---|---|
| M2GL060T-FG676I | Microsemi Corporation | Check for Price | Field Programmable Gate Array, PBGA676, 27 X 27 MM, 1 MM PITCH, FBGA-676 | M2GL060T-FGG676I vs M2GL060T-FG676I |
M2GL060T-FGG676I Frequently Asked Questions (FAQ)
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Microchip provides a PCB design guide for the M2GL060T-FGG676I, which includes recommendations for PCB layout, routing, and signal integrity. It's essential to follow these guidelines to ensure signal integrity and minimize electromagnetic interference (EMI).
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A reliable POR circuit can be implemented using an external resistor-capacitor (RC) network connected to the POR pin. The RC network should be designed to ensure a minimum pulse width of 10 ms to guarantee a reliable reset. Additionally, it's recommended to use a voltage supervisor IC to monitor the power supply voltage and generate a reset signal if it falls below a certain threshold.
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The M2GL060T-FGG676I has a maximum junction temperature (TJ) of 100°C. To ensure reliable operation, it's essential to implement proper thermal management, including heat sinks, thermal interfaces, and airflow management. The FPGA's thermal design guide provides more information on thermal management and heat sink design.
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To optimize power consumption, it's recommended to use the FPGA's power-saving features, such as clock gating, dynamic voltage and frequency scaling, and power gating. Additionally, optimizing the design's clock frequency, using low-power modes, and minimizing switching activity can also help reduce power consumption.
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To implement a reliable JTAG interface, it's essential to follow the IEEE 1149.1 standard and use a JTAG connector that meets the standard's requirements. Additionally, the JTAG clock frequency should be limited to 10 MHz, and the JTAG interface should be isolated from the FPGA's internal logic to prevent interference.