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Field Programmable Gate Array, PBGA36, WLCSP-36
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
LCMXO3L-1300E-5UWG36ITR1K by Lattice Semiconductor Corporation is a Field Programmable Gate Array.
Field Programmable Gate Arrays are under the broader part category of Programmable Logic Devices.
Programmable Logic Devices (PLDs) are reconfigurable digital components that can be customized for different applications, offering flexibility and improved performance over fixed logic devices. Read more about Programmable Logic Devices on our Programmable Logic part category page.
Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
55AJ0506
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Newark | Lattice Machxo3L , 1280 Luts, 1.2V Rohs Compliant: Yes |Lattice Semiconductor LCMXO3L-1300E-5UWG36ITR1K RoHS: Compliant Min Qty: 1000 Package Multiple: 1 Date Code: 0 Container: Reel | 0 |
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$3.8800 / $4.9500 | Buy Now |
DISTI #
842-XO3L13E5U36ITR1K
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Mouser Electronics | FPGA - Field Programmable Gate Array MachXO3, 1280 LUTs 1.2V RoHS: Compliant | 1899 |
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$3.9300 / $4.9500 | Buy Now |
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LCMXO3L-1300E-5UWG36ITR1K
Lattice Semiconductor Corporation
Buy Now
Datasheet
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LCMXO3L-1300E-5UWG36ITR1K
Lattice Semiconductor Corporation
Field Programmable Gate Array, PBGA36, WLCSP-36
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Rohs Code | Yes | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | LATTICE SEMICONDUCTOR CORP | |
Package Description | WLCSP-36 | |
Reach Compliance Code | compliant | |
ECCN Code | EAR99 | |
HTS Code | 8542.39.00.01 | |
Samacsys Manufacturer | Lattice Semiconductor | |
Clock Frequency-Max | 127.2 MHz | |
JESD-30 Code | R-PBGA-B36 | |
Length | 2.541 mm | |
Number of CLBs | 160 | |
Number of Inputs | 28 | |
Number of Logic Cells | 1300 | |
Number of Outputs | 28 | |
Number of Terminals | 36 | |
Operating Temperature-Max | 100 °C | |
Operating Temperature-Min | -40 °C | |
Organization | 160 CLBS | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | VFBGA | |
Package Shape | RECTANGULAR | |
Package Style | GRID ARRAY, VERY THIN PROFILE, FINE PITCH | |
Peak Reflow Temperature (Cel) | NOT SPECIFIED | |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
Seated Height-Max | 0.576 mm | |
Supply Voltage-Max | 1.26 V | |
Supply Voltage-Min | 1.14 V | |
Supply Voltage-Nom | 1.2 V | |
Surface Mount | YES | |
Terminal Form | BALL | |
Terminal Pitch | 0.4 mm | |
Terminal Position | BOTTOM | |
Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED | |
Width | 2.487 mm |
This table gives cross-reference parts and alternative options found for LCMXO3L-1300E-5UWG36ITR1K. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of LCMXO3L-1300E-5UWG36ITR1K, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
Part Number | Manufacturer | Composite Price | Description | Compare |
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LCMXO3L-1300E-5UWG36ITR | Lattice Semiconductor Corporation | Check for Price | Field Programmable Gate Array, PBGA36, WLCSP-36 | LCMXO3L-1300E-5UWG36ITR1K vs LCMXO3L-1300E-5UWG36ITR |
The LCMXO3L-1300E-5UWG36ITR1K has an operating temperature range of -40°C to 100°C.
The LCMXO3L-1300E-5UWG36ITR1K has a built-in clock management system that allows for the creation of a clock tree. This can be implemented using the Lattice Diamond software, which provides a clocking wizard to help design a clock tree.
The power consumption of the LCMXO3L-1300E-5UWG36ITR1K depends on the specific application and usage. However, according to the datasheet, the typical power consumption is around 100-200 mW.
Yes, the LCMXO3L-1300E-5UWG36ITR1K is capable of supporting high-speed interfaces like PCIe and SATA. It has a high-speed I/O capability of up to 1.5 Gbps.
The LCMXO3L-1300E-5UWG36ITR1K has a built-in security feature called TransFR, which provides a secure method for programming and configuring the device. Additionally, the device supports AES encryption and secure boot mechanisms.