Part Details for ICE40LP384-CM49 by Lattice Semiconductor Corporation
Results Overview of ICE40LP384-CM49 by Lattice Semiconductor Corporation
- Distributor Offerings: (7 listings)
- Number of FFF Equivalents: (0 replacements)
- CAD Models: (Request Part)
- Number of Functional Equivalents: (0 options)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
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Applications
Computing and Data Storage
ICE40LP384-CM49 Information
ICE40LP384-CM49 by Lattice Semiconductor Corporation is a Field Programmable Gate Array.
Field Programmable Gate Arrays are under the broader part category of Programmable Logic Devices.
Programmable Logic Devices (PLDs) are reconfigurable digital components that can be customized for different applications, offering flexibility and improved performance over fixed logic devices. Read more about Programmable Logic Devices on our Programmable Logic part category page.
Price & Stock for ICE40LP384-CM49
| Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
54AJ9735
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Newark | Ice40 Lp Ultra Low-Power, 384 Luts, 1.2V Rohs Compliant: Yes |Lattice Semiconductor ICE40LP384-CM49 RoHS: Compliant Min Qty: 10 Package Multiple: 1 Date Code: 0 Container: Bulk | 0 |
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$2.6600 / $4.6000 | Buy Now |
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DISTI #
220-2648-ND
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DigiKey | IC FPGA 37 I/O 49UCBGA Min Qty: 4900 Lead time: 16 Weeks Container: Tray | Temporarily Out of Stock |
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$2.5000 | Buy Now |
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DISTI #
842-ICE40LP384CM49
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Mouser Electronics | FPGA - Field Programmable Gate Array iCE40LP Ultra LowPwr 384 LUTs 1.2V RoHS: Compliant | 2285 |
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$2.6900 / $3.2100 | Buy Now |
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DISTI #
V36:1790_06798009
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Arrow Electronics | FPGA iCE40 LP Family 384 Cells 40nm Technology 1.2V 49-Pin UCBGA Tray RoHS: Compliant Min Qty: 1 Package Multiple: 1 Lead time: 16 Weeks Date Code: 2426 | Americas - 4900 |
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$2.5420 / $3.4830 | Buy Now |
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DISTI #
87706256
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Verical | FPGA iCE40 LP Family 384 Cells 40nm Technology 1.2V 49-Pin UCBGA Tray RoHS: Compliant Min Qty: 3 Package Multiple: 1 Date Code: 2426 | Americas - 4900 |
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$2.5420 / $3.4830 | Buy Now |
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Flip Electronics | Stock | 26455 |
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RFQ | |
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Vyrian | Programmable ICs | 15226 |
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RFQ |
Part Details for ICE40LP384-CM49
ICE40LP384-CM49 CAD Models
ICE40LP384-CM49 Part Data Attributes
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ICE40LP384-CM49
Lattice Semiconductor Corporation
Buy Now
Datasheet
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Compare Parts:
ICE40LP384-CM49
Lattice Semiconductor Corporation
Field Programmable Gate Array, CMOS, PBGA49, UCBGA-49
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| Rohs Code | Yes | |
| Part Life Cycle Code | Active | |
| Ihs Manufacturer | LATTICE SEMICONDUCTOR CORP | |
| Package Description | UCBGA-49 | |
| Reach Compliance Code | compliant | |
| ECCN Code | EAR99 | |
| HTS Code | 8542.31.00.01 | |
| Samacsys Manufacturer | Lattice Semiconductor | |
| Combinatorial Delay of a CLB-Max | 9.36 ns | |
| JESD-30 Code | S-PBGA-B49 | |
| JESD-609 Code | e1 | |
| Length | 3 mm | |
| Moisture Sensitivity Level | 3 | |
| Number of CLBs | 48 | |
| Number of Inputs | 37 | |
| Number of Logic Cells | 384 | |
| Number of Outputs | 37 | |
| Number of Terminals | 49 | |
| Operating Temperature-Max | 100 °C | |
| Operating Temperature-Min | -40 °C | |
| Organization | 48 CLBS | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | VFBGA | |
| Package Shape | SQUARE | |
| Package Style | GRID ARRAY, VERY THIN PROFILE, FINE PITCH | |
| Peak Reflow Temperature (Cel) | 260 | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Seated Height-Max | 1 mm | |
| Supply Voltage-Max | 1.26 V | |
| Supply Voltage-Min | 1.14 V | |
| Supply Voltage-Nom | 1.2 V | |
| Surface Mount | YES | |
| Technology | CMOS | |
| Temperature Grade | INDUSTRIAL | |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) | |
| Terminal Form | BALL | |
| Terminal Pitch | 0.4 mm | |
| Terminal Position | BOTTOM | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Width | 3 mm |
ICE40LP384-CM49 Frequently Asked Questions (FAQ)
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Lattice provides a PCB design guide and layout recommendations in their documentation, including guidelines for signal integrity, power distribution, and thermal management. It's essential to follow these guidelines to ensure reliable operation and minimize signal degradation.
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To optimize power consumption, use the Lattice Diamond software to analyze and optimize the design's power usage. Additionally, consider using power-saving features like dynamic voltage and frequency scaling, clock gating, and shutdown modes. Proper PCB design and component selection also play a crucial role in minimizing power consumption.
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The ICE40LP384-CM49 has a maximum clock frequency of 275 MHz, and the actual achievable frequency depends on the design's complexity, routing, and clock domain crossing. It's essential to carefully plan and optimize the clock architecture to ensure reliable operation at the desired frequency.
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Use the Lattice Diamond software to generate a reliable configuration bitstream, and follow the recommended programming procedures. Ensure that the FPGA is properly powered and clocked during configuration, and use a reliable programming interface, such as JTAG or SPI.
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The ICE40LP384-CM49 has a maximum junction temperature of 85°C. Ensure proper thermal management by providing adequate heat dissipation through the PCB, using thermal vias, and selecting a suitable thermal interface material. Monitor the FPGA's temperature and adjust the design's power consumption accordingly to prevent overheating.