Part Details for CD74HC373EE4 by Texas Instruments
Results Overview of CD74HC373EE4 by Texas Instruments
- Distributor Offerings: (2 listings)
- Number of FFF Equivalents: (9 replacements)
- CAD Models: (Request Part)
- Number of Functional Equivalents: (10 options)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
CD74HC373EE4 Information
CD74HC373EE4 by Texas Instruments is a Bus Driver/Transceiver.
Bus Driver/Transceivers are under the broader part category of Logic Components.
Digital logic governs the behavior of signals in electronic circuits, enabling complex decisions based on simple binary inputs (yes/no). Logic components perform operations from these signals. Read more about Logic Components on our Logic part category page.
Price & Stock for CD74HC373EE4
| Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
296-CD74HC373EE4-ND
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DigiKey | IC D-TYPE TRANSP 8:8 20-PDIP Min Qty: 1000 Lead time: 6 Weeks Container: Tube | Temporarily Out of Stock |
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$0.4365 | Buy Now |
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DISTI #
595-CD74HC373EE4
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Mouser Electronics | Latches Tri-St Octal D-Type ALT 595-CD74HC373E RoHS: Compliant | 485 |
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$0.3730 / $1.6100 | Buy Now |
Part Details for CD74HC373EE4
CD74HC373EE4 CAD Models
CD74HC373EE4 Part Data Attributes
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CD74HC373EE4
Texas Instruments
Buy Now
Datasheet
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CD74HC373EE4
Texas Instruments
High Speed CMOS Logic Octal Transparent Latches with 3-State Outputs 20-PDIP -55 to 125
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| Pbfree Code | Yes | |
| Rohs Code | Yes | |
| Part Life Cycle Code | Active | |
| Ihs Manufacturer | TEXAS INSTRUMENTS INC | |
| Part Package Code | DIP | |
| Package Description | ROHS COMPLIANT, PLASTIC, DIP-20 | |
| Pin Count | 20 | |
| Reach Compliance Code | compliant | |
| HTS Code | 8542.39.00.01 | |
| Samacsys Manufacturer | Texas Instruments | |
| Control Type | ENABLE LOW/HIGH | |
| Count Direction | UNIDIRECTIONAL | |
| Family | HC/UH | |
| JESD-30 Code | R-PDIP-T20 | |
| JESD-609 Code | e4 | |
| Length | 25.4 mm | |
| Load Capacitance (CL) | 50 pF | |
| Logic IC Type | BUS DRIVER | |
| Max I(ol) | 0.0078 A | |
| Number of Bits | 8 | |
| Number of Functions | 8 | |
| Number of Ports | 2 | |
| Number of Terminals | 20 | |
| Operating Temperature-Max | 125 °C | |
| Operating Temperature-Min | -55 °C | |
| Output Characteristics | 3-STATE | |
| Output Polarity | TRUE | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | DIP | |
| Package Equivalence Code | DIP20,.3 | |
| Package Shape | RECTANGULAR | |
| Package Style | IN-LINE | |
| Packing Method | TUBE | |
| Power Supply Current-Max (ICC) | 0.08 mA | |
| Prop. Delay@Nom-Sup | 45 ns | |
| Propagation Delay (tpd) | 265 ns | |
| Qualification Status | Not Qualified | |
| Seated Height-Max | 5.08 mm | |
| Supply Voltage-Max (Vsup) | 6 V | |
| Supply Voltage-Min (Vsup) | 2 V | |
| Supply Voltage-Nom (Vsup) | 4.5 V | |
| Surface Mount | NO | |
| Technology | CMOS | |
| Temperature Grade | MILITARY | |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) | |
| Terminal Form | THROUGH-HOLE | |
| Terminal Pitch | 2.54 mm | |
| Terminal Position | DUAL | |
| Width | 7.62 mm |
Alternate Parts for CD74HC373EE4
This table gives cross-reference parts and alternative options found for CD74HC373EE4. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of CD74HC373EE4, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
| Part Number | Manufacturer | Composite Price | Description | Compare |
|---|---|---|---|---|
| M74HC373B1R | STMicroelectronics | Check for Price | HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, PLASTIC, DIP-20 | CD74HC373EE4 vs M74HC373B1R |
| 8407201RA | Motorola Semiconductor Products | Check for Price | Bus Driver, HC/UH Series, 1-Func, 8-Bit, True Output, CMOS, CDIP20, CERAMIC, DIP-20 | CD74HC373EE4 vs 8407201RA |
| SN74HC373NE4 | Texas Instruments | Check for Price | Octal Transparent D-Type Latches With 3-State Outputs 20-PDIP -40 to 85 | CD74HC373EE4 vs SN74HC373NE4 |
| MC74HC373N | National Semiconductor Corporation | Check for Price | Bus Driver | CD74HC373EE4 vs MC74HC373N |
| M54HC373D1 | STMicroelectronics | Check for Price | HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20, CERAMIC, DIP-20 | CD74HC373EE4 vs M54HC373D1 |
| SNJ54HC373J | Texas Instruments | Check for Price | Octal D-type Transparent Latches With 3-State Outputs 20-CDIP -55 to 125 | CD74HC373EE4 vs SNJ54HC373J |
| SN74HC373N-10 | Texas Instruments | Check for Price | HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20 | CD74HC373EE4 vs SN74HC373N-10 |
| 5962R9579201VRX | Intersil Corporation | Check for Price | HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20 | CD74HC373EE4 vs 5962R9579201VRX |
| M38510/65403BRA | Texas Instruments | Check for Price | Octal D-type Transparent Latches With 3-State Outputs 20-CDIP -55 to 125 | CD74HC373EE4 vs M38510/65403BRA |
CD74HC373EE4 Frequently Asked Questions (FAQ)
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The maximum frequency of operation for the CD74HC373EE4 is 25 MHz, but it can vary depending on the operating voltage and load capacitance.
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To ensure that the output is not corrupted during power-up or power-down, it is recommended to use an external pull-up or pull-down resistor on the output pins, and to use a power-on reset circuit to initialize the device.
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The maximum current that can be sourced or sunk by the output pins of the CD74HC373EE4 is ±25 mA, but it is recommended to limit the current to ±10 mA to ensure reliable operation.
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Yes, the CD74HC373EE4 can be used as a level translator, but it is not recommended as it is not designed for this purpose. The device is intended for latching and buffering applications, and its output voltage levels may not be suitable for level translation.
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During asynchronous operation, the latch enable (LE) input should be tied to a logic high or low level to prevent unwanted latching of the output. If the LE input is not used, it should be tied to a logic low level to prevent unwanted latching.