Part Details for 93LC46BT-E/ST15KVAO by Microchip Technology Inc
Results Overview of 93LC46BT-E/ST15KVAO by Microchip Technology Inc
- Distributor Offerings: (3 listings)
- Number of FFF Equivalents: (0 replacements)
- CAD Models: (Request Part)
- Number of Functional Equivalents: (0 options)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
93LC46BT-E/ST15KVAO Information
93LC46BT-E/ST15KVAO by Microchip Technology Inc is an EEPROM.
EEPROMs are under the broader part category of Memory Components.
Memory components are essential in electronics for computer processing. They can be volatile or non-volatile, depending on the desired function. Read more about Memory Components on our Memory part category page.
Price & Stock for 93LC46BT-E/ST15KVAO
Part # | Distributor | Description | Stock | Price | Buy | |
---|---|---|---|---|---|---|
DISTI #
93LC46BT-E/ST15KVAO-ND
|
DigiKey | IC EEPROM 1KBIT MICROWIRE 8TSSOP Lead time: 14 Weeks Container: Tape & Reel (TR) | Temporarily Out of Stock |
|
Buy Now | |
DISTI #
93LC46BT-E/ST15KVAO
|
Microchip Technology Inc | 1K, 64 X 16 SERIAL EE, TSSOP, Projected EOL: 2044-03-26 COO: Thailand ECCN: EAR99 RoHS: Compliant Lead time: 14 Weeks, 0 Days Container: Reel |
1300 Alternates Available |
|
$0.4200 / $0.5000 | Buy Now |
|
Onlinecomponents.com | 1K Microwire Compatible Serial EEPROM RoHS: Compliant | 25000 Factory Stock |
|
$0 | Buy Now |
Part Details for 93LC46BT-E/ST15KVAO
93LC46BT-E/ST15KVAO CAD Models
93LC46BT-E/ST15KVAO Part Data Attributes
|
93LC46BT-E/ST15KVAO
Microchip Technology Inc
Buy Now
Datasheet
|
Compare Parts:
93LC46BT-E/ST15KVAO
Microchip Technology Inc
EEPROM, 64X16, Serial, CMOS, PDSO8
|
Rohs Code | Yes | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | MICROCHIP TECHNOLOGY INC | |
Package Description | TSSOP-8 | |
Reach Compliance Code | compliant | |
ECCN Code | EAR99 | |
HTS Code | 8542.32.00.51 | |
Factory Lead Time | 14 Weeks | |
Clock Frequency-Max (fCLK) | 2 MHz | |
Data Retention Time-Min | 200 | |
Endurance | 1000000 Write/Erase Cycles | |
JESD-30 Code | R-PDSO-G8 | |
JESD-609 Code | e3 | |
Length | 4.4 mm | |
Memory Density | 1024 bit | |
Memory IC Type | EEPROM | |
Memory Width | 16 | |
Number of Functions | 1 | |
Number of Ports | 1 | |
Number of Terminals | 8 | |
Number of Words | 64 words | |
Number of Words Code | 64 | |
Operating Mode | SYNCHRONOUS | |
Operating Temperature-Max | 125 °C | |
Operating Temperature-Min | -40 °C | |
Organization | 64X16 | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | TSSOP | |
Package Equivalence Code | TSSOP8,.25 | |
Package Shape | RECTANGULAR | |
Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | |
Parallel/Serial | SERIAL | |
Programming Voltage | 5 V | |
Screening Level | AEC-Q100 | |
Seated Height-Max | 1.2 mm | |
Serial Bus Type | MICROWIRE | |
Standby Current-Max | 0.000005 A | |
Supply Current-Max | 0.002 mA | |
Supply Voltage-Max (Vsup) | 5.5 V | |
Supply Voltage-Min (Vsup) | 2.5 V | |
Supply Voltage-Nom (Vsup) | 5 V | |
Surface Mount | YES | |
Technology | CMOS | |
Temperature Grade | AUTOMOTIVE | |
Terminal Finish | Matte Tin (Sn) | |
Terminal Form | GULL WING | |
Terminal Pitch | 0.65 mm | |
Terminal Position | DUAL | |
Width | 3 mm | |
Write Cycle Time-Max (tWC) | 6 ms |
93LC46BT-E/ST15KVAO Frequently Asked Questions (FAQ)
-
The recommended operating voltage range for the 93LC46BT-E/ST15KVAO is 2.5V to 5.5V.
-
The HOLD pin should be pulled high during power-up and power-down sequences to prevent unwanted writes to the device.
-
The maximum clock frequency that can be used with the 93LC46BT-E/ST15KVAO is 3.2 MHz.
-
To ensure data integrity during power failures or brownouts, use a capacitor or other energy storage device to maintain power to the device for a sufficient amount of time to allow the device to complete any pending writes.
-
Yes, the 93LC46BT-E/ST15KVAO can be used in a multi-master bus configuration, but care must be taken to ensure that only one master is accessing the device at a time to prevent data corruption.