Datasheets
10AX027H4F35E3SG by:

Field Programmable Gate Array, 270000-Cell, CMOS, PBGA1152, 35 X 35 MM, ROHS COMPLIANT, FBGA-1152

Part Details for 10AX027H4F35E3SG by Intel Corporation

Results Overview of 10AX027H4F35E3SG by Intel Corporation

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10AX027H4F35E3SG Information

10AX027H4F35E3SG by Intel Corporation is a Field Programmable Gate Array.
Field Programmable Gate Arrays are under the broader part category of Programmable Logic Devices.

Programmable Logic Devices (PLDs) are reconfigurable digital components that can be customized for different applications, offering flexibility and improved performance over fixed logic devices. Read more about Programmable Logic Devices on our Programmable Logic part category page.

Part Details for 10AX027H4F35E3SG

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10AX027H4F35E3SG Part Data Attributes

10AX027H4F35E3SG Intel Corporation
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10AX027H4F35E3SG Intel Corporation Field Programmable Gate Array, 270000-Cell, CMOS, PBGA1152, 35 X 35 MM, ROHS COMPLIANT, FBGA-1152
Rohs Code Yes
Part Life Cycle Code Active
Ihs Manufacturer INTEL CORP
Package Description FBGA-1152
Reach Compliance Code compliant
ECCN Code 3A991
HTS Code 8542.39.00.01
Samacsys Manufacturer Intel
JESD-30 Code S-PBGA-B1152
Length 35 mm
Number of CLBs 10162
Number of Inputs 384
Number of Logic Cells 270000
Number of Outputs 384
Number of Terminals 1152
Operating Temperature-Max 100 °C
Operating Temperature-Min
Organization 10162 CLBS
Package Body Material PLASTIC/EPOXY
Package Code BGA
Package Equivalence Code BGA1152,34X34,40
Package Shape SQUARE
Package Style GRID ARRAY
Peak Reflow Temperature (Cel) NOT SPECIFIED
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Qualification Status Not Qualified
Seated Height-Max 3.35 mm
Supply Voltage-Max 0.93 V
Supply Voltage-Min 0.87 V
Supply Voltage-Nom 0.9 V
Surface Mount YES
Technology TSMC
Temperature Grade OTHER
Terminal Form BALL
Terminal Pitch 1 mm
Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 35 mm

10AX027H4F35E3SG Related Parts

10AX027H4F35E3SG Frequently Asked Questions (FAQ)

  • Intel provides a PCB design guide for the Arria 10 SoC family, which includes the 10AX027H4F35E3SG. The guide recommends a 4-6 layer PCB stackup with a minimum of two power planes and two signal layers. It also provides guidelines for signal routing, decoupling, and thermal management.

  • Intel provides a PowerPlay Early Power Estimator (EPE) tool that allows you to estimate power consumption based on your design's specific requirements. You can also use the Quartus II software to analyze and optimize power consumption during the design process.

  • The 10AX027H4F35E3SG has a maximum junction temperature of 100°C. Intel recommends using a heat sink or thermal solution that can dissipate up to 15W of power. You should also ensure good airflow and thermal conduction in your system design.

  • Intel recommends using a reliable configuration device, such as a flash memory or an external memory interface, to store the FPGA's configuration data. You should also ensure that the power supply is stable and meets the FPGA's power requirements during configuration and boot-up.

  • The 10AX027H4F35E3SG is a commercial-grade FPGA and is not designed for radiation-hardened or high-reliability applications. However, Intel provides environmental testing data, such as temperature and humidity testing, in the datasheet. You should consult with Intel or a qualified reliability expert to determine the FPGA's suitability for your specific application.

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